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author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-07-06 12:04:26 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-07-06 12:04:26 +0300 |
commit | a681e6559ce6fe8ca56333f7041d0a0d38aaee94 (patch) | |
tree | 8f369aaa68139cf75a444ac404bae12e52c4ea80 /arch/riscv/mm/cacheflush.c | |
parent | 53c2f13c1ee59c8889bf23ef58653677e3ec1644 (diff) | |
parent | 7b59ab988c01c190f1b528cf750d6f33b738d1e2 (diff) | |
download | linux-rolling-stable.tar.xz |
Merge v6.15.5linux-rolling-stable
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/riscv/mm/cacheflush.c')
-rw-r--r-- | arch/riscv/mm/cacheflush.c | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/riscv/mm/cacheflush.c b/arch/riscv/mm/cacheflush.c index b81672729887..b2e4b81763f8 100644 --- a/arch/riscv/mm/cacheflush.c +++ b/arch/riscv/mm/cacheflush.c @@ -24,7 +24,20 @@ void flush_icache_all(void) if (num_online_cpus() < 2) return; - else if (riscv_use_sbi_for_rfence()) + + /* + * Make sure all previous writes to the D$ are ordered before making + * the IPI. The RISC-V spec states that a hart must execute a data fence + * before triggering a remote fence.i in order to make the modification + * visable for remote harts. + * + * IPIs on RISC-V are triggered by MMIO writes to either CLINT or + * S-IMSIC, so the fence ensures previous data writes "happen before" + * the MMIO. + */ + RISCV_FENCE(w, o); + + if (riscv_use_sbi_for_rfence()) sbi_remote_fence_i(NULL); else on_each_cpu(ipi_remote_fence_i, NULL, 1); |