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| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-08-20 20:42:41 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-08-20 20:42:41 +0300 |
| commit | 5c40cd7db64a2949f268d7467b9be551a565d14b (patch) | |
| tree | fb8a67f6edcb0c9922c256a598d675c1c04051d6 /arch/riscv/lib/uaccess_vector.S | |
| parent | 8bde384a2090759efc9b92f34300887d418a2a3a (diff) | |
| parent | 25bf10be219d37d2fb221c93816a913f5f735530 (diff) | |
| download | linux-rolling-stable.tar.xz | |
Merge v6.16.2linux-rolling-stable
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/riscv/lib/uaccess_vector.S')
| -rw-r--r-- | arch/riscv/lib/uaccess_vector.S | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/arch/riscv/lib/uaccess_vector.S b/arch/riscv/lib/uaccess_vector.S index 7c45f26de4f7..03b5560609a2 100644 --- a/arch/riscv/lib/uaccess_vector.S +++ b/arch/riscv/lib/uaccess_vector.S @@ -24,7 +24,18 @@ SYM_FUNC_START(__asm_vector_usercopy) /* Enable access to user memory */ li t6, SR_SUM csrs CSR_STATUS, t6 + mv t6, ra + call __asm_vector_usercopy_sum_enabled + + /* Disable access to user memory */ + mv ra, t6 + li t6, SR_SUM + csrc CSR_STATUS, t6 + ret +SYM_FUNC_END(__asm_vector_usercopy) + +SYM_FUNC_START(__asm_vector_usercopy_sum_enabled) loop: vsetvli iVL, iNum, e8, ELEM_LMUL_SETTING, ta, ma fixup vle8.v vData, (pSrc), 10f @@ -36,8 +47,6 @@ loop: /* Exception fixup for vector load is shared with normal exit */ 10: - /* Disable access to user memory */ - csrc CSR_STATUS, t6 mv a0, iNum ret @@ -49,4 +58,4 @@ loop: csrr t2, CSR_VSTART sub iNum, iNum, t2 j 10b -SYM_FUNC_END(__asm_vector_usercopy) +SYM_FUNC_END(__asm_vector_usercopy_sum_enabled) |