diff options
author | Heiko Stuebner <heiko.stuebner@vrull.eu> | 2023-02-09 01:53:28 +0300 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2023-02-28 19:00:34 +0300 |
commit | 6934cf8a3e0b4a8318ce8f1342348e967e29192f (patch) | |
tree | 0a0cabf60b22d188fc8897a179667699e41328ee /arch/riscv/lib/strlen.S | |
parent | 01687e7c935ef70eca69ea2d468020bc93e898dc (diff) | |
download | linux-6934cf8a3e0b4a8318ce8f1342348e967e29192f.tar.xz |
RISC-V: improve string-function assembly
Adapt the suggestions for the assembly string functions that Andrew
suggested but that I didn't manage to include into the series that
got applied.
This includes improvements to two comments, removal of unneeded labels
and moving one instruction slightly higher to contradict an
explanatory comment.
Suggested-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@vrull.eu>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230208225328.1636017-3-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/lib/strlen.S')
-rw-r--r-- | arch/riscv/lib/strlen.S | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/arch/riscv/lib/strlen.S b/arch/riscv/lib/strlen.S index 8345ceeee3f6..15bb8f3aa959 100644 --- a/arch/riscv/lib/strlen.S +++ b/arch/riscv/lib/strlen.S @@ -96,7 +96,7 @@ strlen_zbb: * of valid bytes in this chunk. */ srli a0, t1, 3 - bgtu t3, a0, 3f + bgtu t3, a0, 2f /* Prepare for the word comparison loop. */ addi t2, t0, SZREG @@ -112,20 +112,20 @@ strlen_zbb: addi t0, t0, SZREG orc.b t1, t1 beq t1, t3, 1b -2: + not t1, t1 CZ t1, t1 + srli t1, t1, 3 - /* Get number of processed words. */ + /* Get number of processed bytes. */ sub t2, t0, t2 /* Add number of characters in the first word. */ add a0, a0, t2 - srli t1, t1, 3 /* Add number of characters in the last word. */ add a0, a0, t1 -3: +2: ret .option pop |