diff options
author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-05-02 08:59:33 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-05-02 08:59:33 +0300 |
commit | b004c046df92c429202e899f3f117814a5eb02d3 (patch) | |
tree | 1ac2b86f3a22d67776025c40840f522e269558e3 /arch/riscv/include/asm/cacheflush.h | |
parent | c04005ef3576893e2db315d9ea2cfa4cf88b2c05 (diff) | |
parent | c72e4daa7ab2814e402f2b67dd1681ea4db446af (diff) | |
download | linux-rolling-lts.tar.xz |
Merge v6.12.26linux-rolling-lts
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/riscv/include/asm/cacheflush.h')
-rw-r--r-- | arch/riscv/include/asm/cacheflush.h | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/arch/riscv/include/asm/cacheflush.h b/arch/riscv/include/asm/cacheflush.h index 8de73f91bfa3..b59ffeb668d6 100644 --- a/arch/riscv/include/asm/cacheflush.h +++ b/arch/riscv/include/asm/cacheflush.h @@ -34,11 +34,6 @@ static inline void flush_dcache_page(struct page *page) flush_dcache_folio(page_folio(page)); } -/* - * RISC-V doesn't have an instruction to flush parts of the instruction cache, - * so instead we just flush the whole thing. - */ -#define flush_icache_range(start, end) flush_icache_all() #define flush_icache_user_page(vma, pg, addr, len) \ do { \ if (vma->vm_flags & VM_EXEC) \ @@ -78,6 +73,16 @@ void flush_icache_mm(struct mm_struct *mm, bool local); #endif /* CONFIG_SMP */ +/* + * RISC-V doesn't have an instruction to flush parts of the instruction cache, + * so instead we just flush the whole thing. + */ +#define flush_icache_range flush_icache_range +static inline void flush_icache_range(unsigned long start, unsigned long end) +{ + flush_icache_all(); +} + extern unsigned int riscv_cbom_block_size; extern unsigned int riscv_cboz_block_size; void riscv_init_cbo_blocksizes(void); |