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| author | Anup Patel <Anup.Patel@wdc.com> | 2019-05-15 09:30:39 +0300 |
|---|---|---|
| committer | Paul Walmsley <paul.walmsley@sifive.com> | 2019-07-01 23:04:54 +0300 |
| commit | 6dd91e0eacff0a5c822ca37565d6b5740c4d2a80 (patch) | |
| tree | 4498415d0d6a3f44a479f17b4c588a90a73c61c5 /arch/riscv/configs | |
| parent | 6fbc7275c7a9ba97877050335f290341a1fd8dbf (diff) | |
| download | linux-6dd91e0eacff0a5c822ca37565d6b5740c4d2a80.tar.xz | |
RISC-V: defconfig: Enable NO_HZ_IDLE and HIGH_RES_TIMERS
This patch enables NO_HZ_IDLE (idle dynamic ticks) and HIGH_RES_TIMERS
(hrtimers) in RV32 and RV64 defconfigs.
Both of the above options are enabled by default for architectures
such as x86, ARM, and ARM64.
The idle dynamic ticks helps use save power by stopping timer ticks
when the system is idle whereas hrtimers is a much improved timer
subsystem compared to the old "timer wheel" based system.
This patch is tested on SiFive Unleashed board and QEMU Virt machine.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Palmer Dabbelt <palmer@sifive.com>
Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com>
Diffstat (limited to 'arch/riscv/configs')
| -rw-r--r-- | arch/riscv/configs/defconfig | 2 | ||||
| -rw-r--r-- | arch/riscv/configs/rv32_defconfig | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 04944fb4fa7a..87cb6d13e868 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -1,5 +1,7 @@ CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_CGROUPS=y diff --git a/arch/riscv/configs/rv32_defconfig b/arch/riscv/configs/rv32_defconfig index 1a911ed8e772..d5449ef805a3 100644 --- a/arch/riscv/configs/rv32_defconfig +++ b/arch/riscv/configs/rv32_defconfig @@ -1,5 +1,7 @@ CONFIG_SYSVIPC=y CONFIG_POSIX_MQUEUE=y +CONFIG_NO_HZ_IDLE=y +CONFIG_HIGH_RES_TIMERS=y CONFIG_IKCONFIG=y CONFIG_IKCONFIG_PROC=y CONFIG_CGROUPS=y |