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| author | Christoph Müllner <christoph.muellner@vrull.eu> | 2024-04-08 00:32:35 +0300 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@rivosinc.com> | 2024-04-25 20:22:33 +0300 |
| commit | 6179d4a213006491ff0d50073256f21fad22149b (patch) | |
| tree | bf55144e4a977d2846ee9f0ff9df4b2281defe4e /arch/riscv/Kconfig.errata | |
| parent | 6613476e225e090cc9aad49be7fa504e290dd33d (diff) | |
| download | linux-6179d4a213006491ff0d50073256f21fad22149b.tar.xz | |
riscv: thead: Rename T-Head PBMT to MAE
T-Head's vendor extension to set page attributes has the name
MAE (memory attribute extension).
Let's rename it, so it is clear what this referes to.
Link: https://github.com/T-head-Semi/thead-extension-spec/blob/master/xtheadmae.adoc
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Link: https://lore.kernel.org/r/20240407213236.2121592-2-christoph.muellner@vrull.eu
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'arch/riscv/Kconfig.errata')
| -rw-r--r-- | arch/riscv/Kconfig.errata | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/riscv/Kconfig.errata b/arch/riscv/Kconfig.errata index 910ba8837add..2acc7d876e1f 100644 --- a/arch/riscv/Kconfig.errata +++ b/arch/riscv/Kconfig.errata @@ -82,14 +82,14 @@ config ERRATA_THEAD Otherwise, please say "N" here to avoid unnecessary overhead. -config ERRATA_THEAD_PBMT - bool "Apply T-Head memory type errata" +config ERRATA_THEAD_MAE + bool "Apply T-Head's memory attribute extension (XTheadMae) errata" depends on ERRATA_THEAD && 64BIT && MMU select RISCV_ALTERNATIVE_EARLY default y help - This will apply the memory type errata to handle the non-standard - memory type bits in page-table-entries on T-Head SoCs. + This will apply the memory attribute extension errata to handle the + non-standard PTE utilization on T-Head SoCs (XTheadMae). If you don't know what to do here, say "Y". |