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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-05-06 07:40:40 +0400 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2013-05-06 07:40:40 +0400 |
| commit | 3fd47f063b17692e843128e2abda3e697df42198 (patch) | |
| tree | d90a5bdd247b0cc5af7cf78cd18cf6e27a884f00 /arch/powerpc/platforms/embedded6xx | |
| parent | 342d6666f7276723e418b91c885b0c03f02eeaaf (diff) | |
| download | linux-3fd47f063b17692e843128e2abda3e697df42198.tar.xz | |
powerpc/pci: Support per-aperture memory offset
The PCI core supports an offset per aperture nowadays but our arch
code still has a single offset per host bridge representing the
difference betwen CPU memory addresses and PCI MMIO addresses.
This is a problem as new machines and hypervisor versions are
coming out where the 64-bit windows will have a different offset
(basically mapped 1:1) from the 32-bit windows.
This fixes it by using separate offsets. In the long run, we probably
want to get rid of that intermediary struct pci_controller and have
those directly stored into the pci_host_bridge as they are parsed
but this will be a more invasive change.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/embedded6xx')
| -rw-r--r-- | arch/powerpc/platforms/embedded6xx/mpc10x.h | 11 |
1 files changed, 0 insertions, 11 deletions
diff --git a/arch/powerpc/platforms/embedded6xx/mpc10x.h b/arch/powerpc/platforms/embedded6xx/mpc10x.h index b30a6a3b5bd2..b290b63661f1 100644 --- a/arch/powerpc/platforms/embedded6xx/mpc10x.h +++ b/arch/powerpc/platforms/embedded6xx/mpc10x.h @@ -81,17 +81,6 @@ #define MPC10X_MAPB_PCI_MEM_OFFSET (MPC10X_MAPB_ISA_MEM_BASE - \ MPC10X_MAPB_PCI_MEM_START) -/* Set hose members to values appropriate for the mem map used */ -#define MPC10X_SETUP_HOSE(hose, map) { \ - (hose)->pci_mem_offset = MPC10X_MAP##map##_PCI_MEM_OFFSET; \ - (hose)->io_space.start = MPC10X_MAP##map##_PCI_IO_START; \ - (hose)->io_space.end = MPC10X_MAP##map##_PCI_IO_END; \ - (hose)->mem_space.start = MPC10X_MAP##map##_PCI_MEM_START; \ - (hose)->mem_space.end = MPC10X_MAP##map##_PCI_MEM_END; \ - (hose)->io_base_virt = (void *)MPC10X_MAP##map##_ISA_IO_BASE; \ -} - - /* Miscellaneous Configuration register offsets */ #define MPC10X_CFG_PIR_REG 0x09 #define MPC10X_CFG_PIR_HOST_BRIDGE 0x00 |