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authorAnjali K <anjalik@linux.ibm.com>2024-05-28 07:03:56 +0300
committerMichael Ellerman <mpe@ellerman.id.au>2024-06-17 15:47:16 +0300
commit0300a92e96cb393a1891d3b4a0f00b28dde8643b (patch)
tree36a55b7e31c43326f0a41527f078faa15c17a82d /arch/powerpc/perf/power10-pmu.c
parent2bac6caee94e25f59ee47e2d365d7e07465089ba (diff)
downloadlinux-0300a92e96cb393a1891d3b4a0f00b28dde8643b.tar.xz
powerpc/perf: Set cpumode flags using sample address
Currently in some cases, when the sampled instruction address register latches to a specific address during sampling, the privilege bits captured in the sampled event register are incorrect. For example, a snippet from the perf report on a power10 system is: Overhead Address Command Shared Object Symbol ........ .................. ............ ................. ....................... 2.41% 0x7fff9f94a02c null_syscall [unknown] [k] 0x00007fff9f94a02c 2.20% 0x7fff9f94a02c null_syscall libc.so.6 [.] syscall perf_get_misc_flags() function looks at the privilege bits to return the corresponding flags to be used for the address symbol and these privilege bit details are read from the sampled event register. In the above snippet, address "0x00007fff9f94a02c" is shown as "k" (kernel) due to the incorrect privilege bits captured in the sampled event register. To address this case check whether the sampled address is in the kernel area. Since this is specific to the latest platform, a new pmu flag is added called "PPMU_P10" and is used to contain the proposed fix. PPMU_P10_DD1 marked events are also included under PPMU_P10, hence remove the code specific to PPMU_P10_DD1 marked events. Signed-off-by: Anjali K <anjalik@linux.ibm.com> Reviewed-by: Athira Rajeev <atrajeev@linux.vnet.ibm.com <mailto:atrajeev@linux.vnet.ibm.com>> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://msgid.link/20240528040356.2722275-1-anjalik@linux.ibm.com
Diffstat (limited to 'arch/powerpc/perf/power10-pmu.c')
-rw-r--r--arch/powerpc/perf/power10-pmu.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/perf/power10-pmu.c b/arch/powerpc/perf/power10-pmu.c
index 62a68b6b2d4b..bb57b7cfe640 100644
--- a/arch/powerpc/perf/power10-pmu.c
+++ b/arch/powerpc/perf/power10-pmu.c
@@ -593,7 +593,8 @@ static struct power_pmu power10_pmu = {
.get_mem_weight = isa207_get_mem_weight,
.disable_pmc = isa207_disable_pmc,
.flags = PPMU_HAS_SIER | PPMU_ARCH_207S |
- PPMU_ARCH_31 | PPMU_HAS_ATTR_CONFIG1,
+ PPMU_ARCH_31 | PPMU_HAS_ATTR_CONFIG1 |
+ PPMU_P10,
.n_generic = ARRAY_SIZE(power10_generic_events),
.generic_events = power10_generic_events,
.cache_events = &power10_cache_events,