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authorPalmer Dabbelt <palmer@rivosinc.com>2025-03-27 01:54:12 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2025-03-27 01:54:12 +0300
commitdf02351331671abb26788bc13f6d276e26ae068f (patch)
tree4e1f8ee707cf6570f39feb47fc5bb151358ebd34 /arch/powerpc/lib/code-patching.c
parent2014c95afecee3e76ca4a56956a936e23283f05b (diff)
parent74f4bf9d15ad1d6862b828d486ed10ea0e874a23 (diff)
downloadlinux-df02351331671abb26788bc13f6d276e26ae068f.tar.xz
Merge tag 'riscv-mw1-6.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux into for-next
riscv patches for 6.15-rc1 * A bunch of fixes: - We were missing a secondary mmu notifier call when flushing the tlb which is required for IOMMU - Fix ftrace panics by saving the registers as expected by ftrace - Fix a couple of stimecmp usage related to cpu hotplug - Fix a bunch of issues in the misaligned probing handling * Perf improvements: - Introduce support for runtime constant improving perf of d_hash() - Add support for huge pfnmaps to improve tlb utilization - Use Zawrs to improve smp_cond_load8/16() used by the queued spinlocks * Hwprobe additions: - Add support for Zicntr and Zihpm - Add support for Zaamo and Zalrsc - Add support for bfloat16 extensiosn - Add support for Zicbom (only enabling clean and flush, not inval for security reasons) * Misc: - Add a kernel parameter to bypass the misaligned speed probing since we can't rely on Zicclsm * tag 'riscv-mw1-6.15-rc1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/alexghiti/linux: (1585 commits) riscv: Add runtime constant support riscv: Move nop definition to insn-def.h Documentation/kernel-parameters: Add riscv unaligned speed parameters riscv: Add parameter for skipping access speed tests riscv: Fix set up of vector cpu hotplug callback riscv: Fix set up of cpu hotplug callbacks riscv: Change check_unaligned_access_speed_all_cpus to void riscv: Fix check_unaligned_access_all_cpus riscv: Fix riscv_online_cpu_vec riscv: Annotate unaligned access init functions KVM: riscv: selftests: Add Zaamo/Zalrsc extensions to get-reg-list test RISC-V: KVM: Allow Zaamo/Zalrsc extensions for Guest/VM riscv: hwprobe: export Zaamo and Zalrsc extensions riscv: add parsing for Zaamo and Zalrsc extensions dt-bindings: riscv: add Zaamo and Zalrsc ISA extension description riscv: fgraph: Fix stack layout to match __arch_ftrace_regs argument of ftrace_return_to_handler riscv: fgraph: Select HAVE_FUNCTION_GRAPH_TRACER depends on HAVE_DYNAMIC_FTRACE_WITH_ARGS riscv: Fix missing __free_pages() in check_vector_unaligned_access() riscv: Fix the __riscv_copy_vec_words_unaligned implementation riscv: mm: Don't use %pK through printk ...
Diffstat (limited to 'arch/powerpc/lib/code-patching.c')
-rw-r--r--arch/powerpc/lib/code-patching.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index af97fbb3c257..f84e0337cc02 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -108,7 +108,7 @@ static int text_area_cpu_up(unsigned int cpu)
unsigned long addr;
int err;
- area = get_vm_area(PAGE_SIZE, VM_ALLOC);
+ area = get_vm_area(PAGE_SIZE, 0);
if (!area) {
WARN_ONCE(1, "Failed to create text area for cpu %d\n",
cpu);
@@ -493,7 +493,9 @@ static int __do_patch_instructions_mm(u32 *addr, u32 *code, size_t len, bool rep
orig_mm = start_using_temp_mm(patching_mm);
+ kasan_disable_current();
err = __patch_instructions(patch_addr, code, len, repeat_instr);
+ kasan_enable_current();
/* context synchronisation performed by __patch_instructions */
stop_using_temp_mm(patching_mm, orig_mm);