diff options
author | Paul Mackerras <paulus@samba.org> | 2005-11-16 05:38:21 +0300 |
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committer | Paul Mackerras <paulus@samba.org> | 2005-11-16 05:52:21 +0300 |
commit | 94b212c29f685ca54b5689a8e89ac7671c43d651 (patch) | |
tree | 356266520a5ba530b2a5b77b68e90e87a2402ecb /arch/powerpc/boot/crt0.S | |
parent | 7486a38f683d49e6f8b2b9050ff06778b151a40c (diff) | |
download | linux-94b212c29f685ca54b5689a8e89ac7671c43d651.tar.xz |
powerpc: Move ppc64 boot wrapper code over to arch/powerpc
This also extends the code to handle 32-bit ELF vmlinux files as well
as 64-bit ones. This is sufficient for booting on new-world 32-bit
powermacs (i.e. all recent machines).
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/boot/crt0.S')
-rw-r--r-- | arch/powerpc/boot/crt0.S | 59 |
1 files changed, 59 insertions, 0 deletions
diff --git a/arch/powerpc/boot/crt0.S b/arch/powerpc/boot/crt0.S new file mode 100644 index 000000000000..9cc442263939 --- /dev/null +++ b/arch/powerpc/boot/crt0.S @@ -0,0 +1,59 @@ +/* + * Copyright (C) Paul Mackerras 1997. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License + * as published by the Free Software Foundation; either version + * 2 of the License, or (at your option) any later version. + * + * NOTE: this code runs in 32 bit mode and is packaged as ELF32. + */ + +#include "ppc_asm.h" + + .text + .globl _zimage_start +_zimage_start: + bl reloc_offset + +reloc_offset: + mflr r0 + lis r9,reloc_offset@ha + addi r9,r9,reloc_offset@l + subf. r0,r9,r0 + beq clear_caches + +reloc_got2: + lis r9,__got2_start@ha + addi r9,r9,__got2_start@l + lis r8,__got2_end@ha + addi r8,r8,__got2_end@l + subf. r8,r9,r8 + beq clear_caches + srwi. r8,r8,2 + mtctr r8 + add r9,r0,r9 +reloc_got2_loop: + lwz r8,0(r9) + add r8,r8,r0 + stw r8,0(r9) + addi r9,r9,4 + bdnz reloc_got2_loop + +clear_caches: + lis r9,_start@h + add r9,r0,r9 + lis r8,_etext@ha + addi r8,r8,_etext@l + add r8,r0,r8 +1: dcbf r0,r9 + icbi r0,r9 + addi r9,r9,0x20 + cmplwi 0,r9,8 + blt 1b + sync + isync + + mr r6,r1 + b start + |