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| author | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-08-24 19:32:51 +0300 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-09-07 23:24:51 +0300 |
| commit | 43df4eb2fc9511e09c66252c3fec4f8933a77c73 (patch) | |
| tree | 372ef0796bbfdf94373ce22b0489f6a26c127be8 /arch/mips/include/asm/war.h | |
| parent | a7fbed988f31d3bf92415226fdf2ffd54606ad93 (diff) | |
| download | linux-43df4eb2fc9511e09c66252c3fec4f8933a77c73.tar.xz | |
MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS
SB1250 uart bug is related to PASS 2 workarounds. Use config
CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR.
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/war.h')
| -rw-r--r-- | arch/mips/include/asm/war.h | 7 |
1 files changed, 0 insertions, 7 deletions
diff --git a/arch/mips/include/asm/war.h b/arch/mips/include/asm/war.h index 4f4d37b3dd07..2ce5cd61a072 100644 --- a/arch/mips/include/asm/war.h +++ b/arch/mips/include/asm/war.h @@ -86,11 +86,4 @@ #error Check setting of BCM1250_M3_WAR for your platform #endif -/* - * This is a DUART workaround related to glitches around register accesses - */ -#ifndef SIBYTE_1956_WAR -#error Check setting of SIBYTE_1956_WAR for your platform -#endif - #endif /* _ASM_WAR_H */ |