From 43df4eb2fc9511e09c66252c3fec4f8933a77c73 Mon Sep 17 00:00:00 2001 From: Thomas Bogendoerfer Date: Mon, 24 Aug 2020 18:32:51 +0200 Subject: MIPS: Replace SIBYTE_1956_WAR by CONFIG_SB1_PASS_2_WORKAROUNDS SB1250 uart bug is related to PASS 2 workarounds. Use config CONFIG_SB1_PASS_2_WORKAROUNDS directly and get rid of SIBYTE_1956_WAR. Signed-off-by: Thomas Bogendoerfer --- arch/mips/include/asm/war.h | 7 ------- 1 file changed, 7 deletions(-) (limited to 'arch/mips/include/asm/war.h') diff --git a/arch/mips/include/asm/war.h b/arch/mips/include/asm/war.h index 4f4d37b3dd07..2ce5cd61a072 100644 --- a/arch/mips/include/asm/war.h +++ b/arch/mips/include/asm/war.h @@ -86,11 +86,4 @@ #error Check setting of BCM1250_M3_WAR for your platform #endif -/* - * This is a DUART workaround related to glitches around register accesses - */ -#ifndef SIBYTE_1956_WAR -#error Check setting of SIBYTE_1956_WAR for your platform -#endif - #endif /* _ASM_WAR_H */ -- cgit v1.2.3