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| author | Huacai Chen <chenhc@lemote.com> | 2020-04-30 12:45:16 +0300 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2020-04-30 17:33:24 +0300 |
| commit | e9dfbaaeef1c9fee3f3a898defc4562db20c2edf (patch) | |
| tree | 73cd71bfe8ed176593346dfcc61ca881b478df8e /arch/mips/include/asm/mach-loongson64 | |
| parent | 44220fd84f3fa25208a441ae7a2cf0cf44699655 (diff) | |
| download | linux-e9dfbaaeef1c9fee3f3a898defc4562db20c2edf.tar.xz | |
MIPS: perf: Add hardware perf events support for new Loongson-3
New Loongson-3 means Loongson-3A R2 (Loongson-3A2000) and newer CPUs.
Loongson-3 processors have three types of PMU types (so there are three
event maps): Loongson-3A1000/Loonngson-3B1000/Loongson-3B1500 is Type-1,
Loongson-3A2000/Loongson-3A3000 is Type-2, Loongson-3A4000+ is Type-3.
Signed-off-by: Huacai Chen <chenhc@lemote.com>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'arch/mips/include/asm/mach-loongson64')
| -rw-r--r-- | arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h index 4fab38c743dd..b6e9c99b85a5 100644 --- a/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h +++ b/arch/mips/include/asm/mach-loongson64/cpu-feature-overrides.h @@ -48,5 +48,6 @@ #define cpu_hwrena_impl_bits 0xc0000000 #define cpu_has_mac2008_only 1 #define cpu_has_mips_r2_exec_hazard 0 +#define cpu_has_perf_cntr_intr_bit 0 #endif /* __ASM_MACH_LOONGSON64_CPU_FEATURE_OVERRIDES_H */ |