diff options
| author | Paul Burton <paul.burton@imgtec.com> | 2014-03-03 16:08:40 +0400 |
|---|---|---|
| committer | Paul Burton <paul.burton@imgtec.com> | 2014-05-28 19:20:14 +0400 |
| commit | e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce (patch) | |
| tree | fdf4723703809f156461e58305a66817339c10c9 /arch/mips/include/asm/cacheflush.h | |
| parent | 76ae658465c2319a63f3814b1e1e6e0664a1f542 (diff) | |
| download | linux-e2a9e5ad719fb424ab3c30520733aa0e8fbcf1ce.tar.xz | |
MIPS: add kmap_noncoherent to wire a cached non-coherent TLB entry
This is identical to kmap_coherent apart from the cache coherency
attribute used for the TLB entry, so kmap_coherent is abstracted to
kmap_prot which is then called for both kmap_coherent &
kmap_noncoherent. This will be used by a subsequent patch.
Suggested-by: Leonid Yegoshin <leonid.yegoshin@imgtec.com>
Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Diffstat (limited to 'arch/mips/include/asm/cacheflush.h')
| -rw-r--r-- | arch/mips/include/asm/cacheflush.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/mips/include/asm/cacheflush.h b/arch/mips/include/asm/cacheflush.h index 69468ded2828..e08381a37f8b 100644 --- a/arch/mips/include/asm/cacheflush.h +++ b/arch/mips/include/asm/cacheflush.h @@ -113,6 +113,12 @@ unsigned long run_uncached(void *func); extern void *kmap_coherent(struct page *page, unsigned long addr); extern void kunmap_coherent(void); +extern void *kmap_noncoherent(struct page *page, unsigned long addr); + +static inline void kunmap_noncoherent(void) +{ + kunmap_coherent(); +} #define ARCH_HAS_FLUSH_KERNEL_DCACHE_PAGE static inline void flush_kernel_dcache_page(struct page *page) |