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authorAl Viro <viro@ftp.linux.org.uk>2007-07-26 20:34:59 +0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-07-26 22:11:57 +0400
commit6aa8b04975e71fb3d67bec7fbe2995b9bf54a06e (patch)
tree2eb8233f350766a3582d5a3dfcf87c3590f44c81 /arch/ia64
parent712aaa1cb1c0a83e5ffb5376e1d7ee3dd539f4e4 (diff)
downloadlinux-6aa8b04975e71fb3d67bec7fbe2995b9bf54a06e.tar.xz
cyclone.c: silly use of volatile, __iomem fixes
u32* volatile cyclone_timer means volatile auto pointer to u32, which is clearly not what had been intended (we never even take the address of that variable, let alone pass it to something that could change it behind our back). u32 volatile * is what the authors apparently wanted to say, but in reality we don't need that qualifier there at all - it's (properly) only passed to iomem helpers which takes care of that stuff just fine. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'arch/ia64')
-rw-r--r--arch/ia64/kernel/cyclone.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/ia64/kernel/cyclone.c b/arch/ia64/kernel/cyclone.c
index 2fd96d9062a1..790ef0d87e12 100644
--- a/arch/ia64/kernel/cyclone.c
+++ b/arch/ia64/kernel/cyclone.c
@@ -38,11 +38,11 @@ static struct clocksource clocksource_cyclone = {
int __init init_cyclone_clock(void)
{
- u64* reg;
+ u64 __iomem *reg;
u64 base; /* saved cyclone base address */
u64 offset; /* offset from pageaddr to cyclone_timer register */
int i;
- u32* volatile cyclone_timer; /* Cyclone MPMC0 register */
+ u32 __iomem *cyclone_timer; /* Cyclone MPMC0 register */
if (!use_cyclone)
return 0;
@@ -51,7 +51,7 @@ int __init init_cyclone_clock(void)
/* find base address */
offset = (CYCLONE_CBAR_ADDR);
- reg = (u64*)ioremap_nocache(offset, sizeof(u64));
+ reg = ioremap_nocache(offset, sizeof(u64));
if(!reg){
printk(KERN_ERR "Summit chipset: Could not find valid CBAR"
" register.\n");
@@ -69,7 +69,7 @@ int __init init_cyclone_clock(void)
/* setup PMCC */
offset = (base + CYCLONE_PMCC_OFFSET);
- reg = (u64*)ioremap_nocache(offset, sizeof(u64));
+ reg = ioremap_nocache(offset, sizeof(u64));
if(!reg){
printk(KERN_ERR "Summit chipset: Could not find valid PMCC"
" register.\n");
@@ -81,7 +81,7 @@ int __init init_cyclone_clock(void)
/* setup MPCS */
offset = (base + CYCLONE_MPCS_OFFSET);
- reg = (u64*)ioremap_nocache(offset, sizeof(u64));
+ reg = ioremap_nocache(offset, sizeof(u64));
if(!reg){
printk(KERN_ERR "Summit chipset: Could not find valid MPCS"
" register.\n");
@@ -93,7 +93,7 @@ int __init init_cyclone_clock(void)
/* map in cyclone_timer */
offset = (base + CYCLONE_MPMC_OFFSET);
- cyclone_timer = (u32*)ioremap_nocache(offset, sizeof(u32));
+ cyclone_timer = ioremap_nocache(offset, sizeof(u32));
if(!cyclone_timer){
printk(KERN_ERR "Summit chipset: Could not find valid MPMC"
" register.\n");
@@ -110,7 +110,7 @@ int __init init_cyclone_clock(void)
printk(KERN_ERR "Summit chipset: Counter not counting!"
" DISABLED\n");
iounmap(cyclone_timer);
- cyclone_timer = 0;
+ cyclone_timer = NULL;
use_cyclone = 0;
return -ENODEV;
}