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| author | Fuad Tabba <tabba@google.com> | 2021-05-24 11:29:52 +0300 |
|---|---|---|
| committer | Will Deacon <will@kernel.org> | 2021-05-25 21:27:49 +0300 |
| commit | d044f8141847bee542998a6fd8de2c270fe40e48 (patch) | |
| tree | b6ed1bb19a1f7730252c4953ab3eb70eed37ec5e /arch/arm64/mm/cache.S | |
| parent | 06b7a568ca5e9cb79a0cc4737f498ea90d8fa89d (diff) | |
| download | linux-d044f8141847bee542998a6fd8de2c270fe40e48.tar.xz | |
arm64: Fix comments to refer to correct function __flush_icache_range
Many comments refer to the function flush_icache_range, where the
intent is in fact __flush_icache_range. Fix these comments to
refer to the intended function.
That's probably due to commit 3b8c9f1cdfc506e9 ("arm64: IPI each
CPU after invalidating the I-cache for kernel mappings"), which
renamed flush_icache_range() to __flush_icache_range() and added
a wrapper.
No functional change intended.
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20210524083001.2586635-10-tabba@google.com
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'arch/arm64/mm/cache.S')
| -rw-r--r-- | arch/arm64/mm/cache.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S index 14eac9d76d57..910ae8f6a389 100644 --- a/arch/arm64/mm/cache.S +++ b/arch/arm64/mm/cache.S @@ -43,7 +43,7 @@ alternative_else_nop_endif .endm /* - * flush_icache_range(start,end) + * __flush_icache_range(start,end) * * Ensure that the I and D caches are coherent within specified region. * This is typically used when code has been written to a memory region, |