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| author | Catalin Marinas <catalin.marinas@arm.com> | 2014-03-26 22:25:55 +0400 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2014-04-05 13:06:18 +0400 |
| commit | c218bca74eeafa2f8528b6bbb34d112075fcf40a (patch) | |
| tree | 29b3e350efca77e073436df3cf78b818bf57cc34 /arch/arm64/mm/cache.S | |
| parent | 35a86976924a9eda7775b5b02ad47268dca1a5b4 (diff) | |
| download | linux-c218bca74eeafa2f8528b6bbb34d112075fcf40a.tar.xz | |
arm64: Relax the kernel cache requirements for boot
With system caches for the host OS or architected caches for guest OS we
cannot easily guarantee that there are no dirty or stale cache lines for
the areas of memory written by the kernel during boot with the MMU off
(therefore non-cacheable accesses).
This patch adds the necessary cache maintenance during boot and relaxes
the booting requirements.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm64/mm/cache.S')
| -rw-r--r-- | arch/arm64/mm/cache.S | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S index c46f48b33c14..e803a62e0e45 100644 --- a/arch/arm64/mm/cache.S +++ b/arch/arm64/mm/cache.S @@ -168,6 +168,14 @@ ENTRY(__flush_dcache_area) ENDPROC(__flush_dcache_area) /* + * __inval_cache_range(start, end) + * - start - start address of region + * - end - end address of region + */ +ENTRY(__inval_cache_range) + /* FALLTHROUGH */ + +/* * __dma_inv_range(start, end) * - start - virtual start address of region * - end - virtual end address of region @@ -183,6 +191,7 @@ __dma_inv_range: b.lo 1b dsb sy ret +ENDPROC(__inval_cache_range) ENDPROC(__dma_inv_range) /* |