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| author | Raghavendra Rao Ananta <rananta@google.com> | 2023-08-11 07:51:21 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2023-08-17 11:40:35 +0300 |
| commit | 4d73a9c13aaa78b149ac04b02f0ee7973f233bfa (patch) | |
| tree | 884b8c99bcda11879632f40d43947c0c8d0956c8 /arch/arm64/include/asm/tlbflush.h | |
| parent | 360839027a6e4c022e8cbaa373dd747185f1e0a5 (diff) | |
| download | linux-4d73a9c13aaa78b149ac04b02f0ee7973f233bfa.tar.xz | |
arm64: tlb: Implement __flush_s2_tlb_range_op()
Define __flush_s2_tlb_range_op(), as a wrapper over
__flush_tlb_range_op(), for stage-2 specific range-based TLBI
operations that doesn't necessarily have to deal with 'asid'
and 'tlbi_user' arguments.
Signed-off-by: Raghavendra Rao Ananta <rananta@google.com>
Reviewed-by: Shaoqin Huang <shahuang@redhat.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230811045127.3308641-9-rananta@google.com
Diffstat (limited to 'arch/arm64/include/asm/tlbflush.h')
| -rw-r--r-- | arch/arm64/include/asm/tlbflush.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h index b9475a852d5b..93f4b397f9a1 100644 --- a/arch/arm64/include/asm/tlbflush.h +++ b/arch/arm64/include/asm/tlbflush.h @@ -340,6 +340,9 @@ do { \ } \ } while (0) +#define __flush_s2_tlb_range_op(op, start, pages, stride, tlb_level) \ + __flush_tlb_range_op(op, start, pages, stride, 0, tlb_level, false) + static inline void __flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end, unsigned long stride, bool last_level, |