diff options
| author | Will Deacon <will.deacon@arm.com> | 2015-02-03 19:14:13 +0300 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2015-07-27 17:28:50 +0300 |
| commit | c09d6a04d17d730b0463207a26ece082772b59ee (patch) | |
| tree | 43aec4a96946d28bc0fd985b1219317bdcb2b8d2 /arch/arm64/include/asm/atomic.h | |
| parent | c0385b24af15020a1e505f2c984db0d7c0d017e1 (diff) | |
| download | linux-c09d6a04d17d730b0463207a26ece082772b59ee.tar.xz | |
arm64: atomics: patch in lse instructions when supported by the CPU
On CPUs which support the LSE atomic instructions introduced in ARMv8.1,
it makes sense to use them in preference to ll/sc sequences.
This patch introduces runtime patching of atomic_t and atomic64_t
routines so that the call-site for the out-of-line ll/sc sequences is
patched with an LSE atomic instruction when we detect that
the CPU supports it.
If binutils is not recent enough to assemble the LSE instructions, then
the ll/sc sequences are inlined as though CONFIG_ARM64_LSE_ATOMICS=n.
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Diffstat (limited to 'arch/arm64/include/asm/atomic.h')
| -rw-r--r-- | arch/arm64/include/asm/atomic.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/include/asm/atomic.h b/arch/arm64/include/asm/atomic.h index 84635f2d3d0a..836226d5e12c 100644 --- a/arch/arm64/include/asm/atomic.h +++ b/arch/arm64/include/asm/atomic.h @@ -21,11 +21,11 @@ #define __ASM_ATOMIC_H #include <linux/compiler.h> -#include <linux/stringify.h> #include <linux/types.h> #include <asm/barrier.h> #include <asm/cmpxchg.h> +#include <asm/lse.h> #define ATOMIC_INIT(i) { (i) } @@ -33,7 +33,7 @@ #define __ARM64_IN_ATOMIC_IMPL -#ifdef CONFIG_ARM64_LSE_ATOMICS +#if defined(CONFIG_ARM64_LSE_ATOMICS) && defined(CONFIG_AS_LSE) #include <asm/atomic_lse.h> #else #include <asm/atomic_ll_sc.h> |