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authorOlof Johansson <olof@lixom.net>2017-09-02 02:44:19 +0300
committerOlof Johansson <olof@lixom.net>2017-09-02 02:44:19 +0300
commitc911171a7488c0028cfa05f2cf52f0067c7c880b (patch)
tree23dc652ece2c52276fab85e4b41e3261b1b7b6a4 /arch/arm64/boot/dts
parented09f6d05c1839ee658c664419a9ad0c58168216 (diff)
parent72af17b9a8caa1fd373c7615cdfef5ee10e20577 (diff)
downloadlinux-c911171a7488c0028cfa05f2cf52f0067c7c880b.tar.xz
Merge tag 'mvebu-dt64-4.14-4' of git://git.infradead.org/linux-mvebu into next/dt64
mvebu dt64 for 4.14 (part 4) Adding more resources on the network controller ppv2.2 on Armada 7K/8K allowing to use last improvement introduced in the driver. Also enabling more network ports on the mcbin (A8K base board) * tag 'mvebu-dt64-4.14-4' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: mcbin: enable more networking ports arm64: dts: marvell: add a reference to the sysctrl syscon in the ppv2 node arm64: dts: marvell: add TX interrupts for PPv2.2 Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'arch/arm64/boot/dts')
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts30
-rw-r--r--arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi25
-rw-r--r--arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi25
3 files changed, 74 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
index 21fb721be6cb..acf5c7d16d79 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
+++ b/arch/arm64/boot/dts/marvell/armada-8040-mcbin.dts
@@ -202,6 +202,30 @@
};
};
+&cpm_xmdio {
+ status = "okay";
+
+ phy0: ethernet-phy@0 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <0>;
+ };
+
+ phy8: ethernet-phy@8 {
+ compatible = "ethernet-phy-ieee802.3-c45";
+ reg = <8>;
+ };
+};
+
+&cpm_ethernet {
+ status = "okay";
+};
+
+&cpm_eth0 {
+ status = "okay";
+ phy = <&phy0>;
+ phy-mode = "10gbase-kr";
+};
+
&cpm_sata0 {
/* CPM Lane 0 - U29 */
status = "okay";
@@ -231,6 +255,12 @@
status = "okay";
};
+&cps_eth0 {
+ status = "okay";
+ phy = <&phy8>;
+ phy-mode = "10gbase-kr";
+};
+
&cps_eth1 {
/* CPS Lane 0 - J5 (Gigabit RJ45) */
status = "okay";
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
index 8b019a9f4f59..8263a8a504a8 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -65,25 +65,44 @@
reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cpm_clk 1 3>, <&cpm_clk 1 9>, <&cpm_clk 1 5>;
clock-names = "pp_clk", "gop_clk", "mg_clk";
+ marvell,system-controller = <&cpm_syscon0>;
status = "disabled";
dma-coherent;
cpm_eth0: eth0 {
- interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
+ "tx-cpu3", "rx-shared";
port-id = <0>;
gop-port-id = <0>;
status = "disabled";
};
cpm_eth1: eth1 {
- interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
+ "tx-cpu3", "rx-shared";
port-id = <1>;
gop-port-id = <2>;
status = "disabled";
};
cpm_eth2: eth2 {
- interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
+ "tx-cpu3", "rx-shared";
port-id = <2>;
gop-port-id = <3>;
status = "disabled";
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
index 7c1100133731..b71ee6c83668 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi
@@ -65,25 +65,44 @@
reg = <0x0 0x100000>, <0x129000 0xb000>;
clocks = <&cps_clk 1 3>, <&cps_clk 1 9>, <&cps_clk 1 5>;
clock-names = "pp_clk", "gop_clk", "mg_clk";
+ marvell,system-controller = <&cps_syscon0>;
status = "disabled";
dma-coherent;
cps_eth0: eth0 {
- interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <ICU_GRP_NSR 39 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 43 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 47 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 51 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 55 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
+ "tx-cpu3", "rx-shared";
port-id = <0>;
gop-port-id = <0>;
status = "disabled";
};
cps_eth1: eth1 {
- interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <ICU_GRP_NSR 40 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 44 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 48 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 52 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 56 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
+ "tx-cpu3", "rx-shared";
port-id = <1>;
gop-port-id = <2>;
status = "disabled";
};
cps_eth2: eth2 {
- interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts = <ICU_GRP_NSR 41 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 45 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 49 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 53 IRQ_TYPE_LEVEL_HIGH>,
+ <ICU_GRP_NSR 57 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "tx-cpu0", "tx-cpu1", "tx-cpu2",
+ "tx-cpu3", "rx-shared";
port-id = <2>;
gop-port-id = <3>;
status = "disabled";