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| author | Peter Geis <pgwipeout@gmail.com> | 2021-07-28 21:00:34 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2021-09-15 18:50:40 +0300 |
| commit | 40b0bfbb95e0ce4049b652367062e074b063c0b8 (patch) | |
| tree | 921958797645be1803d87853fce27d43658634a5 /arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | |
| parent | 1330875dc2a3742fd41127e78d5036f2d8f261da (diff) | |
| download | linux-40b0bfbb95e0ce4049b652367062e074b063c0b8.tar.xz | |
arm64: dts: rockchip: add thermal support to Quartz64 Model A
Add the thermal nodes for the Quartz64 Model A.
The Model A supports a single speed gpio fan.
Signed-off-by: Peter Geis <pgwipeout@gmail.com>
Link: https://lore.kernel.org/r/20210728180034.717953-9-pgwipeout@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts index b239f314b38a..a244f7b87e38 100644 --- a/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts +++ b/arch/arm64/boot/dts/rockchip/rk3566-quartz64-a.dts @@ -27,6 +27,14 @@ #clock-cells = <0>; }; + fan: gpio_fan { + compatible = "gpio-fan"; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + gpio-fan,speed-map = <0 0 + 4500 1>; + #cooling-cells = <2>; + }; + leds { compatible = "gpio-leds"; @@ -124,6 +132,23 @@ cpu-supply = <&vdd_cpu>; }; +&cpu_thermal { + trips { + cpu_hot: cpu_hot { + temperature = <55000>; + hysteresis = <2000>; + type = "active"; + }; + }; + + cooling-maps { + map1 { + trip = <&cpu_hot>; + cooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; + }; + }; +}; + &gmac1 { assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>; assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru SCLK_GMAC1>, <&gmac1_clkin>; @@ -433,6 +458,14 @@ status = "okay"; }; +&tsadc { + /* tshut mode 0:CRU 1:GPIO */ + rockchip,hw-tshut-mode = <1>; + /* tshut polarity 0:LOW 1:HIGH */ + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + &uart0 { pinctrl-names = "default"; pinctrl-0 = <&uart0_xfer>; |