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authorYangbo Lu <yangbo.lu@nxp.com>2017-05-09 05:37:07 +0300
committerShawn Guo <shawnguo@kernel.org>2017-05-15 04:34:52 +0300
commit6557a16c4ea7a430c013a8c88ecc6eb8166cb7ab (patch)
tree2484c13214d0512fe921ea641d18f47a9a76febf /arch/arm64/boot/dts/freescale
parenta87b843dc44b85afbacf113357e2e4c6b0f98572 (diff)
downloadlinux-6557a16c4ea7a430c013a8c88ecc6eb8166cb7ab.tar.xz
arm64: dts: ls208xa: support SD UHS-I on RDB and eMMC HS200 on QDS
This patch is to enable SD UHS-I mode on LS208xRDB and eMMC HS200 mode on LS208xQDS in dts. Also, the eSDHC peripheral clock must be used instead of platform clock to support these modes. Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm64/boot/dts/freescale')
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi1
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi4
-rw-r--r--arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi2
3 files changed, 6 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
index c4282d9deb74..b2374469a830 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-qds.dtsi
@@ -46,6 +46,7 @@
*/
&esdhc {
+ mmc-hs200-1_8v;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
index 9a1d0d2ab1c3..29af54be2665 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa-rdb.dtsi
@@ -46,6 +46,10 @@
*/
&esdhc {
+ sd-uhs-sdr104;
+ sd-uhs-sdr50;
+ sd-uhs-sdr25;
+ sd-uhs-sdr12;
status = "okay";
};
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
index 6e531b9c36b6..94cdd3045037 100644
--- a/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
+++ b/arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi
@@ -472,7 +472,7 @@
compatible = "fsl,ls2080a-esdhc", "fsl,esdhc";
reg = <0x0 0x2140000 0x0 0x10000>;
interrupts = <0 28 0x4>; /* Level high type */
- clock-frequency = <0>; /* Updated by bootloader */
+ clocks = <&clockgen 4 1>;
voltage-ranges = <1800 1800 3300 3300>;
sdhci,auto-cmd12;
little-endian;