diff options
author | Martin Blumenstingl <martin.blumenstingl@googlemail.com> | 2020-06-20 19:23:47 +0300 |
---|---|---|
committer | Kevin Hilman <khilman@baylibre.com> | 2020-07-13 21:57:46 +0300 |
commit | 32b5f4b63487a24712c3bfa1d6a8eb9257beb8bd (patch) | |
tree | b1624a3f449e2c70ec871f23ef27f17e5188adfb /arch/arm64/boot/dts/amlogic | |
parent | 5273d6cacc067e7a8552e29cabddb4934f4e05b7 (diff) | |
download | linux-32b5f4b63487a24712c3bfa1d6a8eb9257beb8bd.tar.xz |
arm64: dts: amlogic: Add the Ethernet "timing-adjustment" clock
Add the "timing-adjustment" clock now that we know how it is connected
to the PRG_ETHERNET registers. It is used internally to generate the
RGMII RX delay on the MAC side (if needed).
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Link: https://lore.kernel.org/r/20200620162347.26159-1-martin.blumenstingl@googlemail.com
Diffstat (limited to 'arch/arm64/boot/dts/amlogic')
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 6 | ||||
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 | ||||
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi | 5 | ||||
-rw-r--r-- | arch/arm64/boot/dts/amlogic/meson-gxl.dtsi | 5 |
4 files changed, 14 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 8e6281c685fa..b9efc8469265 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -181,8 +181,10 @@ interrupt-names = "macirq"; clocks = <&clkc CLKID_ETH>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", + "timing-adjustment"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; status = "disabled"; diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi index 593a006f4b7b..41805f2ed8fc 100644 --- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi @@ -185,8 +185,10 @@ interrupt-names = "macirq"; clocks = <&clkc CLKID_ETH>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", + "timing-adjustment"; rx-fifo-depth = <4096>; tx-fifo-depth = <2048>; status = "disabled"; diff --git a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi index 8bf6295716e0..ea50dd434887 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxbb.dtsi @@ -333,8 +333,9 @@ ðmac { clocks = <&clkc CLKID_ETH>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; }; &gpio_intc { diff --git a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi index fe7aaf8873f2..beb5fc79d186 100644 --- a/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-gxl.dtsi @@ -131,8 +131,9 @@ ðmac { clocks = <&clkc CLKID_ETH>, <&clkc CLKID_FCLK_DIV2>, - <&clkc CLKID_MPLL2>; - clock-names = "stmmaceth", "clkin0", "clkin1"; + <&clkc CLKID_MPLL2>, + <&clkc CLKID_FCLK_DIV2>; + clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment"; mdio0: mdio { #address-cells = <1>; |