diff options
| author | Chen-Yu Tsai <wens@csie.org> | 2020-07-17 19:00:49 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2020-07-20 16:29:47 +0300 |
| commit | 5fa21c1354c93cb9fe8239545b17eee46e39dd69 (patch) | |
| tree | c568486be648b560d6fdcb064bb3473bdb3ec023 /arch/arm64/boot/dts/allwinner | |
| parent | e4dae01bf08b754de79072441c357737220b873f (diff) | |
| download | linux-5fa21c1354c93cb9fe8239545b17eee46e39dd69.tar.xz | |
arm64: dts: allwinner: h5: Add clock to CPU cores
The ARM CPU cores are fed by the CPU clock from the CCU. Add a
reference to the clock for each CPU core, along with the clock
transition latency.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20200717160053.31191-5-wens@kernel.org
Diffstat (limited to 'arch/arm64/boot/dts/allwinner')
| -rw-r--r-- | arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi index 4462a68c0681..09523f6011c5 100644 --- a/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5.dtsi @@ -13,6 +13,8 @@ device_type = "cpu"; reg = <0>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu1: cpu@1 { @@ -20,6 +22,8 @@ device_type = "cpu"; reg = <1>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu2: cpu@2 { @@ -27,6 +31,8 @@ device_type = "cpu"; reg = <2>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; cpu3: cpu@3 { @@ -34,6 +40,8 @@ device_type = "cpu"; reg = <3>; enable-method = "psci"; + clocks = <&ccu CLK_CPUX>; + clock-latency-ns = <244144>; /* 8 32k periods */ }; }; |