diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-05-06 10:42:23 +0400 |
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committer | Ben Dooks <ben-linux@fluff.org> | 2010-05-11 12:45:46 +0400 |
commit | fcef85c0c122f90f57f2f3ef0caeaf6404d6e8f3 (patch) | |
tree | f674a70c38a71309d27029f2c25d18a15800cf88 /arch/arm/plat-samsung/include/plat/gpio-core.h | |
parent | 1d3ef014b5fe959a789c2df708713d58c9491c3b (diff) | |
download | linux-fcef85c0c122f90f57f2f3ef0caeaf6404d6e8f3.tar.xz |
ARM: SAMSUNG: Add spinlock locking to GPIO banks
Add locking to each GPIO bank to allow for SMP capable code
to use the gpiolib functions. See the gpio-core.h header file
for more information.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/gpio-core.h')
-rw-r--r-- | arch/arm/plat-samsung/include/plat/gpio-core.h | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h index f0584f26d493..f3a68d1a07b9 100644 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ b/arch/arm/plat-samsung/include/plat/gpio-core.h @@ -44,16 +44,26 @@ struct s3c_gpio_cfg; * @chip: The chip structure to be exported via gpiolib. * @base: The base pointer to the gpio configuration registers. * @config: special function and pull-resistor control information. + * @lock: Lock for exclusive access to this gpio bank. * @pm_save: Save information for suspend/resume support. * * This wrapper provides the necessary information for the Samsung * specific gpios being registered with gpiolib. + * + * The lock protects each gpio bank from multiple access of the shared + * configuration registers, or from reading of data whilst another thread + * is writing to the register set. + * + * Each chip has its own lock to avoid any contention between different + * CPU cores trying to get one lock for different GPIO banks, where each + * bank of GPIO has its own register space and configuration registers. */ struct s3c_gpio_chip { struct gpio_chip chip; struct s3c_gpio_cfg *config; struct s3c_gpio_pm *pm; void __iomem *base; + spinlock_t lock; #ifdef CONFIG_PM u32 pm_save[4]; #endif @@ -138,3 +148,7 @@ extern struct s3c_gpio_pm s3c_gpio_pm_4bit; #define __gpio_pm(x) NULL #endif /* CONFIG_PM */ + +/* locking wrappers to deal with multiple access to the same gpio bank */ +#define s3c_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) +#define s3c_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) |