diff options
author | Russell King <rmk@dyn-67.arm.linux.org.uk> | 2008-08-05 19:14:15 +0400 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-08-07 12:55:48 +0400 |
commit | a09e64fbc0094e3073dbb09c3b4bfe4ab669244b (patch) | |
tree | 69689f467179891b498bd7423fcf61925173db31 /arch/arm/mach-s3c2410/include/mach/uncompress.h | |
parent | a1b81a84fff05dbfef45b7012c26e1fee9973e5d (diff) | |
download | linux-a09e64fbc0094e3073dbb09c3b4bfe4ab669244b.tar.xz |
[ARM] Move include/asm-arm/arch-* to arch/arm/*/include/mach
This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-s3c2410/include/mach/uncompress.h')
-rw-r--r-- | arch/arm/mach-s3c2410/include/mach/uncompress.h | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/mach-s3c2410/include/mach/uncompress.h b/arch/arm/mach-s3c2410/include/mach/uncompress.h new file mode 100644 index 000000000000..708e47459ffc --- /dev/null +++ b/arch/arm/mach-s3c2410/include/mach/uncompress.h @@ -0,0 +1,52 @@ +/* arch/arm/mach-s3c2410/include/mach/uncompress.h + * + * Copyright (c) 2003, 2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * S3C2410 - uncompress code + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. +*/ + +#ifndef __ASM_ARCH_UNCOMPRESS_H +#define __ASM_ARCH_UNCOMPRESS_H + +#include <mach/regs-gpio.h> +#include <mach/map.h> + +/* working in physical space... */ +#undef S3C2410_GPIOREG +#define S3C2410_GPIOREG(x) ((S3C24XX_PA_GPIO + (x))) + +#include <asm/plat-s3c/uncompress.h> + +static inline int is_arm926(void) +{ + unsigned int cpuid; + + asm volatile ("mrc p15, 0, %0, c1, c0, 0" : "=r" (cpuid)); + + return ((cpuid & 0xff0) == 0x260); +} + +static void arch_detect_cpu(void) +{ + unsigned int cpuid; + + cpuid = *((volatile unsigned int *)S3C2410_GSTATUS1); + cpuid &= S3C2410_GSTATUS1_IDMASK; + + if (is_arm926() || cpuid == S3C2410_GSTATUS1_2440 || + cpuid == S3C2410_GSTATUS1_2442) { + fifo_mask = S3C2440_UFSTAT_TXMASK; + fifo_max = 63 << S3C2440_UFSTAT_TXSHIFT; + } else { + fifo_mask = S3C2410_UFSTAT_TXMASK; + fifo_max = 15 << S3C2410_UFSTAT_TXSHIFT; + } +} + +#endif /* __ASM_ARCH_UNCOMPRESS_H */ |