diff options
author | Heiko Stuebner <heiko@sntech.de> | 2013-06-18 00:29:23 +0400 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2014-03-01 20:21:57 +0400 |
commit | a7a2b3118b410fb3cd3a8363b157c56f4211ee05 (patch) | |
tree | 28f762f27421a638fdbf1aa4a2c7c1dfadddd700 /arch/arm/mach-rockchip/headsmp.S | |
parent | 46b8219c519be424ab96b5b7fabee171c1e6b4c7 (diff) | |
download | linux-a7a2b3118b410fb3cd3a8363b157c56f4211ee05.tar.xz |
ARM: rockchip: add smp bringup code
This adds the necessary smp-operations and startup code to use
additional cores on Rockchip SoCs.
We currently hog the power management unit in the smp code, as it is
necessary to control the power to the cpu core and nothing else is
currently using it, so a generic implementation can be done later.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Tested-by: Ulrich Prinz <ulrich.prinz@googlemail.com>
Diffstat (limited to 'arch/arm/mach-rockchip/headsmp.S')
-rw-r--r-- | arch/arm/mach-rockchip/headsmp.S | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/headsmp.S b/arch/arm/mach-rockchip/headsmp.S new file mode 100644 index 000000000000..73206e360e31 --- /dev/null +++ b/arch/arm/mach-rockchip/headsmp.S @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2013 MundoReader S.L. + * Author: Heiko Stuebner <heiko@sntech.de> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ +#include <linux/linkage.h> +#include <linux/init.h> + +ENTRY(rockchip_secondary_startup) + bl v7_invalidate_l1 + b secondary_startup +ENDPROC(rockchip_secondary_startup) + +ENTRY(rockchip_secondary_trampoline) + ldr pc, 1f +ENDPROC(rockchip_secondary_trampoline) + .globl rockchip_boot_fn +rockchip_boot_fn: +1: .space 4 + +ENTRY(rockchip_secondary_trampoline_end) |