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authorSaeed Bishara <saeed@marvell.com>2008-06-17 14:25:12 +0400
committerLennert Buytenhek <buytenh@marvell.com>2008-08-09 17:17:28 +0400
commit1d5a1a6e92abb1ecb011a673e637146c4e232f1e (patch)
tree66a608528e39e0c49645e8cafbed00d4dc761e55 /arch/arm/mach-orion5x/common.c
parent3af6b0440f7b318af3f6a4c4ce251753377dba3a (diff)
downloadlinux-1d5a1a6e92abb1ecb011a673e637146c4e232f1e.tar.xz
[ARM] Orion: Instantiate mv_xor driver for 5182
Signed-off-by: Saeed Bishara <saeed@marvell.com> Signed-off-by: Lennert Buytenhek <buytenh@marvell.com>
Diffstat (limited to 'arch/arm/mach-orion5x/common.c')
-rw-r--r--arch/arm/mach-orion5x/common.c98
1 files changed, 98 insertions, 0 deletions
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 8f2146bd8a94..7b11e552bc5a 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -27,6 +27,7 @@
#include <mach/hardware.h>
#include <mach/orion5x.h>
#include <plat/ehci-orion.h>
+#include <plat/mv_xor.h>
#include <plat/orion_nand.h>
#include <plat/time.h>
#include "common.h"
@@ -355,6 +356,103 @@ void __init orion5x_uart1_init(void)
/*****************************************************************************
+ * XOR engine
+ ****************************************************************************/
+static struct resource orion5x_xor_shared_resources[] = {
+ {
+ .name = "xor low",
+ .start = ORION5X_XOR_PHYS_BASE,
+ .end = ORION5X_XOR_PHYS_BASE + 0xff,
+ .flags = IORESOURCE_MEM,
+ }, {
+ .name = "xor high",
+ .start = ORION5X_XOR_PHYS_BASE + 0x200,
+ .end = ORION5X_XOR_PHYS_BASE + 0x2ff,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct platform_device orion5x_xor_shared = {
+ .name = MV_XOR_SHARED_NAME,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(orion5x_xor_shared_resources),
+ .resource = orion5x_xor_shared_resources,
+};
+
+static u64 orion5x_xor_dmamask = DMA_32BIT_MASK;
+
+static struct resource orion5x_xor0_resources[] = {
+ [0] = {
+ .start = IRQ_ORION5X_XOR0,
+ .end = IRQ_ORION5X_XOR0,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mv_xor_platform_data orion5x_xor0_data = {
+ .shared = &orion5x_xor_shared,
+ .hw_id = 0,
+ .pool_size = PAGE_SIZE,
+};
+
+static struct platform_device orion5x_xor0_channel = {
+ .name = MV_XOR_NAME,
+ .id = 0,
+ .num_resources = ARRAY_SIZE(orion5x_xor0_resources),
+ .resource = orion5x_xor0_resources,
+ .dev = {
+ .dma_mask = &orion5x_xor_dmamask,
+ .coherent_dma_mask = DMA_64BIT_MASK,
+ .platform_data = (void *)&orion5x_xor0_data,
+ },
+};
+
+static struct resource orion5x_xor1_resources[] = {
+ [0] = {
+ .start = IRQ_ORION5X_XOR1,
+ .end = IRQ_ORION5X_XOR1,
+ .flags = IORESOURCE_IRQ,
+ },
+};
+
+static struct mv_xor_platform_data orion5x_xor1_data = {
+ .shared = &orion5x_xor_shared,
+ .hw_id = 1,
+ .pool_size = PAGE_SIZE,
+};
+
+static struct platform_device orion5x_xor1_channel = {
+ .name = MV_XOR_NAME,
+ .id = 1,
+ .num_resources = ARRAY_SIZE(orion5x_xor1_resources),
+ .resource = orion5x_xor1_resources,
+ .dev = {
+ .dma_mask = &orion5x_xor_dmamask,
+ .coherent_dma_mask = DMA_64BIT_MASK,
+ .platform_data = (void *)&orion5x_xor1_data,
+ },
+};
+
+void __init orion5x_xor_init(void)
+{
+ platform_device_register(&orion5x_xor_shared);
+
+ /*
+ * two engines can't do memset simultaneously, this limitation
+ * satisfied by removing memset support from one of the engines.
+ */
+ dma_cap_set(DMA_MEMCPY, orion5x_xor0_data.cap_mask);
+ dma_cap_set(DMA_XOR, orion5x_xor0_data.cap_mask);
+ platform_device_register(&orion5x_xor0_channel);
+
+ dma_cap_set(DMA_MEMCPY, orion5x_xor1_data.cap_mask);
+ dma_cap_set(DMA_MEMSET, orion5x_xor1_data.cap_mask);
+ dma_cap_set(DMA_XOR, orion5x_xor1_data.cap_mask);
+ platform_device_register(&orion5x_xor1_channel);
+}
+
+
+/*****************************************************************************
* Time handling
****************************************************************************/
static void orion5x_timer_init(void)