Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm: (137 commits)
  ARM: bcmring: convert to use sp804 clockevents
  ARM: bcmring: convert to sp804 clocksource
  ARM: 6912/1: bcmring: Add clkdev table in init_early
  clockevents: ARM sp804: obtain sp804 timer rate via clks
  clockevents: ARM sp804: allow clockevent name to be specified
  clocksource: ARM sp804: obtain sp804 timer rate via clks
  clocksource: ARM sp804: allow clocksource name to be specified
  clocksource: convert OMAP1 to 32-bit down counting clocksource
  clocksource: convert MXS timrotv2 to 32-bit down counting clocksource
  clocksource: convert SPEAr platforms 16-bit up counting clocksource
  clocksource: convert Integrator/AP 16-bit down counting clocksource
  clocksource: convert W90x900 24-bit down counting clocksource
  clocksource: convert ARM 32-bit down counting clocksources
  clocksource: convert ARM 32-bit up counting clocksources
  clocksource: add common mmio clocksource
  ARM: update sa1100 to reflect PXA updates
  ARM: omap1: convert to using readl/writel instead of volatile struct
  ARM: omap1: delete useless interrupt handler
  ARM: s5p: consolidate selection of timer register
  ARM: 6939/1: fix missing 'cpu_relax()' declaration
  ...

1 files changed, 44 insertions, 0 deletions

diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c
new file mode 100644
index 000000000000..6637cd819ecb
--- /dev/null
+++ b/arch/arm/mach-imx/cpu-imx35.c
@@ -0,0 +1,44 @@
+/*
+ * MX35 CPU type detection
+ *
+ * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+#include <linux/module.h>
+#include <linux/io.h>
+#include <mach/hardware.h>
+#include <mach/iim.h>
+
+unsigned int mx35_cpu_rev;
+EXPORT_SYMBOL(mx35_cpu_rev);
+
+void __init mx35_read_cpu_rev(void)
+{
+	u32 rev;
+	char *srev;
+
+	rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV));
+	switch (rev) {
+	case 0x00:
+		mx35_cpu_rev = IMX_CHIP_REVISION_1_0;
+		srev = "1.0";
+		break;
+	case 0x10:
+		mx35_cpu_rev = IMX_CHIP_REVISION_2_0;
+		srev = "2.0";
+		break;
+	case 0x11:
+		mx35_cpu_rev = IMX_CHIP_REVISION_2_1;
+		srev = "2.1";
+		break;
+	default:
+		mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN;
+		srev = "unknown";
+	}
+
+	printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev);
+}