diff options
| author | Mans Rullgard <mans@mansr.com> | 2020-02-27 14:55:26 +0300 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2020-02-27 15:55:34 +0300 |
| commit | 179a79fd740b6b2f66b64bae5cb6ecd483987d20 (patch) | |
| tree | 61dca177749d767c54bc4c77aec2a6b3dfea19c3 /arch/arm/boot/dts/sunxi-h3-h5.dtsi | |
| parent | 4098a2b45bb3fc2e928487c064974be26c7f6128 (diff) | |
| download | linux-179a79fd740b6b2f66b64bae5cb6ecd483987d20.tar.xz | |
ARM: dts: sunxi: h3/h5: add r_pwm node
There is a second PWM unit available in the PL I/O block.
Add a node and pinmux definition for it.
Signed-off-by: Mans Rullgard <mans@mansr.com>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Diffstat (limited to 'arch/arm/boot/dts/sunxi-h3-h5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sunxi-h3-h5.dtsi | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi b/arch/arm/boot/dts/sunxi-h3-h5.dtsi index 5e9c3060aa08..ed3908849111 100644 --- a/arch/arm/boot/dts/sunxi-h3-h5.dtsi +++ b/arch/arm/boot/dts/sunxi-h3-h5.dtsi @@ -892,6 +892,21 @@ pins = "PL0", "PL1"; function = "s_i2c"; }; + + r_pwm_pin: r-pwm-pin { + pins = "PL10"; + function = "s_pwm"; + }; + }; + + r_pwm: pwm@1f03800 { + compatible = "allwinner,sun8i-h3-pwm"; + reg = <0x01f03800 0x8>; + pinctrl-names = "default"; + pinctrl-0 = <&r_pwm_pin>; + clocks = <&osc24M>; + #pwm-cells = <3>; + status = "disabled"; }; }; }; |