summaryrefslogtreecommitdiff
path: root/arch/arm/boot/dts/ste-href-ab8505.dtsi
diff options
context:
space:
mode:
authorLinus Walleij <linus.walleij@linaro.org>2014-09-30 14:10:11 +0400
committerLinus Walleij <linus.walleij@linaro.org>2014-10-20 11:08:26 +0400
commit51d39936acba666774b596829277db3e13e5e970 (patch)
treef184ee24c2e21ab500e33d382dd2b29f44b3395a /arch/arm/boot/dts/ste-href-ab8505.dtsi
parent68d41f23ce8d049d05bdd96889d3a2504e7f21f0 (diff)
downloadlinux-51d39936acba666774b596829277db3e13e5e970.tar.xz
pinctrl: abx500: force-convert to generic mux bindings
This converts the ABx500 pin controller and all associated device trees to use the standard, generic mux bindings for pin controllers. There are no such device trees deployed in the wild so this is safe to do to set a good example. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/ste-href-ab8505.dtsi')
-rw-r--r--arch/arm/boot/dts/ste-href-ab8505.dtsi60
1 files changed, 30 insertions, 30 deletions
diff --git a/arch/arm/boot/dts/ste-href-ab8505.dtsi b/arch/arm/boot/dts/ste-href-ab8505.dtsi
index 6006d62086a2..112053c7aa51 100644
--- a/arch/arm/boot/dts/ste-href-ab8505.dtsi
+++ b/arch/arm/boot/dts/ste-href-ab8505.dtsi
@@ -35,8 +35,8 @@
gpio2 {
gpio2_default_mode: gpio2_default {
default_mux {
- ste,function = "gpio";
- ste,pins = "gpio2_a_1";
+ function = "gpio";
+ groups = "gpio2_a_1";
};
default_cfg {
ste,pins = "GPIO2_R5";
@@ -48,8 +48,8 @@
gpio10 {
gpio10_default_mode: gpio10_default {
default_mux {
- ste,function = "gpio";
- ste,pins = "gpio10_d_1";
+ function = "gpio";
+ groups = "gpio10_d_1";
};
default_cfg {
ste,pins = "GPIO10_B16";
@@ -61,8 +61,8 @@
gpio11 {
gpio11_default_mode: gpio11_default {
default_mux {
- ste,function = "gpio";
- ste,pins = "gpio11_d_1";
+ function = "gpio";
+ groups = "gpio11_d_1";
};
default_cfg {
ste,pins = "GPIO11_B17";
@@ -74,8 +74,8 @@
gpio13 {
gpio13_default_mode: gpio13_default {
default_mux {
- ste,function = "gpio";
- ste,pins = "gpio13_d_1";
+ function = "gpio";
+ groups = "gpio13_d_1";
};
default_cfg {
ste,pins = "GPIO13_D17";
@@ -87,8 +87,8 @@
gpio34 {
gpio34_default_mode: gpio34_default {
default_mux {
- ste,function = "gpio";
- ste,pins = "gpio34_a_1";
+ function = "gpio";
+ groups = "gpio34_a_1";
};
default_cfg {
ste,pins = "GPIO34_H14";
@@ -100,8 +100,8 @@
gpio50 {
gpio50_default_mode: gpio50_default {
default_mux {
- ste,function = "gpio";
- ste,pins = "gpio50_d_1";
+ function = "gpio";
+ groups = "gpio50_d_1";
};
default_cfg {
ste,pins = "GPIO50_L4";
@@ -114,8 +114,8 @@
pwm {
pwm_default_mode: pwm_default {
default_mux {
- ste,function = "pwmout";
- ste,pins = "pwmout1_d_1";
+ function = "pwmout";
+ groups = "pwmout1_d_1";
};
default_cfg {
ste,pins = "GPIO14_C16";
@@ -128,8 +128,8 @@
adi2 {
adi2_default_mode: adi2_default {
default_mux {
- ste,function = "adi2";
- ste,pins = "adi2_d_1";
+ function = "adi2";
+ groups = "adi2_d_1";
};
default_cfg {
ste,pins = "GPIO17_P2",
@@ -145,8 +145,8 @@
modsclsda {
modsclsda_default_mode: modsclsda_default {
default_mux {
- ste,function = "modsclsda";
- ste,pins = "modsclsda_d_1";
+ function = "modsclsda";
+ groups = "modsclsda_d_1";
};
default_cfg {
ste,pins = "GPIO40_J15",
@@ -159,8 +159,8 @@
resethw {
resethw_default_mode: resethw_default {
default_mux {
- ste,function = "resethw";
- ste,pins = "resethw_d_1";
+ function = "resethw";
+ groups = "resethw_d_1";
};
default_cfg {
ste,pins = "GPIO52_D16";
@@ -172,8 +172,8 @@
service {
service_default_mode: service_default {
default_mux {
- ste,function = "service";
- ste,pins = "service_d_1";
+ function = "service";
+ groups = "service_d_1";
};
default_cfg {
ste,pins = "GPIO53_D15";
@@ -188,8 +188,8 @@
sysclkreq2 {
sysclkreq2_default_mode: sysclkreq2_default {
default_mux {
- ste,function = "sysclkreq";
- ste,pins = "sysclkreq2_d_1";
+ function = "sysclkreq";
+ groups = "sysclkreq2_d_1";
};
default_cfg {
ste,pins = "GPIO1_N4";
@@ -199,8 +199,8 @@
};
sysclkreq2_sleep_mode: sysclkreq2_sleep {
default_mux {
- ste,function = "gpio";
- ste,pins = "gpio1_a_1";
+ function = "gpio";
+ groups = "gpio1_a_1";
};
default_cfg {
ste,pins = "GPIO1_N4";
@@ -212,8 +212,8 @@
sysclkreq4 {
sysclkreq4_default_mode: sysclkreq4_default {
default_mux {
- ste,function = "sysclkreq";
- ste,pins = "sysclkreq4_d_1";
+ function = "sysclkreq";
+ groups = "sysclkreq4_d_1";
};
default_cfg {
ste,pins = "GPIO3_P5";
@@ -223,8 +223,8 @@
};
sysclkreq4_sleep_mode: sysclkreq4_sleep {
default_mux {
- ste,function = "gpio";
- ste,pins = "gpio3_a_1";
+ function = "gpio";
+ groups = "gpio3_a_1";
};
default_cfg {
ste,pins = "GPIO3_P5";