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authorSonny Rao <sonnyrao@chromium.org>2015-04-07 20:52:39 +0300
committerHeiko Stuebner <heiko@sntech.de>2015-04-27 10:27:41 +0300
commitf18407800e5d211028858f86f1e78aacbedad298 (patch)
treeed387056fa3874860fcab851fc9003ee97601af7 /arch/arm/boot/dts/rk3288.dtsi
parentb787f68c36d49bb1d9236f403813641efa74a031 (diff)
downloadlinux-f18407800e5d211028858f86f1e78aacbedad298.tar.xz
ARM: dts: rockchip: Enable Cortex-A12 HW PMU events on rk3288
This adds the dts node for the PMU with the correct PMUIRQ interrupts for each core. Signed-off-by: Sonny Rao <sonnyrao@chromium.org> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288.dtsi')
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi8
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 165968d51d8f..8253abb83f36 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -44,6 +44,14 @@
spi2 = &spi2;
};
+ arm-pmu {
+ compatible = "arm,cortex-a12-pmu";
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
+ };
+
cpus {
#address-cells = <1>;
#size-cells = <0>;