diff options
| author | Sjoerd Simons <sjoerd.simons@collabora.co.uk> | 2016-01-09 15:54:18 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-01-25 11:16:59 +0300 |
| commit | dfa31117dbf01e0aac76674a87a103200347e220 (patch) | |
| tree | caa79518768c79c7550050bb50bac066533e7118 /arch/arm/boot/dts/rk3288-rock2-square.dts | |
| parent | 30c4cbcd48b010259597436017228430edcfe242 (diff) | |
| download | linux-dfa31117dbf01e0aac76674a87a103200347e220.tar.xz | |
ARM: dts: rockchip: Add the SDIO wifi on Radxa Rock2 square
Enable the sdio0 slot on the Rock2 square which has a broadcom wifi chip
attached and add a power sequence to enable the wifi chip and turn on
the required 32k clock.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'arch/arm/boot/dts/rk3288-rock2-square.dts')
| -rw-r--r-- | arch/arm/boot/dts/rk3288-rock2-square.dts | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts b/arch/arm/boot/dts/rk3288-rock2-square.dts index bcaf868a76bb..dd3ad2e93a6d 100644 --- a/arch/arm/boot/dts/rk3288-rock2-square.dts +++ b/arch/arm/boot/dts/rk3288-rock2-square.dts @@ -86,6 +86,15 @@ #sound-dai-cells = <0>; }; + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&hym8563>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable>; + reset-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>; + }; + vcc_usb_host: vcc-host-regulator { compatible = "regulator-fixed"; enable-active-high; @@ -111,6 +120,21 @@ }; }; +&sdio0 { + bus-width = <4>; + cap-sd-highspeed; + cap-sdio-irq; + disable-wp; + mmc-pwrseq = <&sdio_pwrseq>; + non-removable; + num-slots = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&sdio0_bus4 &sdio0_cmd &sdio0_clk &sdio0_int>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc_18>; + status = "okay"; +}; + &sdmmc { bus-width = <4>; cap-mmc-highspeed; @@ -135,7 +159,7 @@ }; &i2c0 { - hym8563@51 { + hym8563: hym8563@51 { compatible = "haoyu,hym8563"; reg = <0x51>; #clock-cells = <0>; @@ -177,6 +201,12 @@ rockchip,pins = <7 11 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + sdio { + wifi_enable: wifi-enable { + rockchip,pins = <4 28 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &spdif { |