diff options
| author | Tero Kristo <t-kristo@ti.com> | 2017-12-08 18:17:28 +0300 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2017-12-11 19:28:35 +0300 |
| commit | 460c49610d5920b7a18799898e33c55f1e096494 (patch) | |
| tree | edfec2356eca871af0aa945714d7d32230847a9e /arch/arm/boot/dts/omap5.dtsi | |
| parent | a5c82a09d876287cd394945dd2a73aaeb6596ecd (diff) | |
| download | linux-460c49610d5920b7a18799898e33c55f1e096494.tar.xz | |
ARM: dts: omap5: add clkctrl nodes
Add clkctrl nodes for OMAP5 SoC. These are going to be acting as
replacement for part of the existing clock data and the existing
clkctrl hooks under hwmod data.
This patch also removes any obsolete clock nodes, and reroutes all users
for these to use the new clkctrl clocks instead.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/boot/dts/omap5.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/omap5.dtsi | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi index b0992b860705..4bc52257df67 100644 --- a/arch/arm/boot/dts/omap5.dtsi +++ b/arch/arm/boot/dts/omap5.dtsi @@ -10,6 +10,7 @@ #include <dt-bindings/gpio/gpio.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/pinctrl/omap.h> +#include <dt-bindings/clock/omap5.h> / { #address-cells = <2>; @@ -744,7 +745,7 @@ interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "timer1"; ti,timer-alwon; - clocks = <&timer1_gfclk_mux>; + clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>; clock-names = "fck"; }; @@ -905,7 +906,8 @@ compatible = "ti,omap-usb2"; reg = <0x4a084000 0x7c>; syscon-phy-power = <&scm_conf 0x300>; - clocks = <&usb_phy_cm_clk32k>, <&usb_otg_ss_refclk960m>; + clocks = <&usb_phy_cm_clk32k>, + <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>; clock-names = "wkupclk", "refclk"; #phy-cells = <0>; }; @@ -919,7 +921,7 @@ syscon-phy-power = <&scm_conf 0x370>; clocks = <&usb_phy_cm_clk32k>, <&sys_clkin>, - <&usb_otg_ss_refclk960m>; + <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>; clock-names = "wkupclk", "sysclk", "refclk"; @@ -987,7 +989,8 @@ <0x4A096800 0x40>; /* pll_ctrl */ reg-names = "phy_rx", "phy_tx", "pll_ctrl"; syscon-phy-power = <&scm_conf 0x374>; - clocks = <&sys_clkin>, <&sata_ref_clk>; + clocks = <&sys_clkin>, + <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>; clock-names = "sysclk", "refclk"; #phy-cells = <0>; }; @@ -999,7 +1002,7 @@ interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; phys = <&sata_phy>; phy-names = "sata-phy"; - clocks = <&sata_ref_clk>; + clocks = <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>; ti,hwmods = "sata"; ports-implemented = <0x1>; }; @@ -1009,7 +1012,7 @@ reg = <0x58000000 0x80>; status = "disabled"; ti,hwmods = "dss_core"; - clocks = <&dss_dss_clk>; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; clock-names = "fck"; #address-cells = <1>; #size-cells = <1>; @@ -1020,7 +1023,7 @@ reg = <0x58001000 0x1000>; interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; ti,hwmods = "dss_dispc"; - clocks = <&dss_dss_clk>; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>; clock-names = "fck"; }; @@ -1029,7 +1032,7 @@ reg = <0x58002000 0x100>; status = "disabled"; ti,hwmods = "dss_rfbi"; - clocks = <&dss_dss_clk>, <&l3_iclk_div>; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>, <&l3_iclk_div>; clock-names = "fck", "ick"; }; @@ -1042,7 +1045,8 @@ interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; ti,hwmods = "dss_dsi1"; - clocks = <&dss_dss_clk>, <&dss_sys_clk>; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>, + <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>; clock-names = "fck", "sys_clk"; }; @@ -1055,7 +1059,8 @@ interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; ti,hwmods = "dss_dsi2"; - clocks = <&dss_dss_clk>, <&dss_sys_clk>; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>, + <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>; clock-names = "fck", "sys_clk"; }; @@ -1069,7 +1074,8 @@ interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; status = "disabled"; ti,hwmods = "dss_hdmi"; - clocks = <&dss_48mhz_clk>, <&dss_sys_clk>; + clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 9>, + <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>; clock-names = "fck", "sys_clk"; dmas = <&sdma 76>; dma-names = "audio_tx"; @@ -1143,7 +1149,7 @@ coefficients = <65 (-1791)>; }; -/include/ "omap54xx-clocks.dtsi" +#include "omap54xx-clocks.dtsi" &gpu_thermal { coefficients = <117 (-2992)>; |