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authorJiri Kosina <jkosina@suse.cz>2018-06-08 11:20:42 +0300
committerJiri Kosina <jkosina@suse.cz>2018-06-08 11:20:42 +0300
commitc1144d29f405ce1f4e6ede6482beb3d0d09750c6 (patch)
tree0f9fe36a50005bae6ffe28a4f978e71273f5b1d1 /arch/arm/boot/dts/nuvoton-npcm750.dtsi
parentd6c70a86bc72fabe7fc9d9533afdb46a56c16896 (diff)
parenta317e559574b2af62095b39792d168cb98cb2561 (diff)
downloadlinux-c1144d29f405ce1f4e6ede6482beb3d0d09750c6.tar.xz
Merge branch 'for-4.18/alps' into for-linus
hid-alps driver cleanups wrt. t4_read_write_register() handling from Christophe Jaillet
Diffstat (limited to 'arch/arm/boot/dts/nuvoton-npcm750.dtsi')
-rw-r--r--arch/arm/boot/dts/nuvoton-npcm750.dtsi44
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nuvoton-npcm750.dtsi b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
new file mode 100644
index 000000000000..6ac340533587
--- /dev/null
+++ b/arch/arm/boot/dts/nuvoton-npcm750.dtsi
@@ -0,0 +1,44 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018 Nuvoton Technology tomer.maimon@nuvoton.com
+// Copyright 2018 Google, Inc.
+
+#include "nuvoton-common-npcm7xx.dtsi"
+
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ interrupt-parent = <&gic>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ enable-method = "nuvoton,npcm750-smp";
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ clocks = <&clk 0>;
+ clock-names = "clk_cpu";
+ reg = <0>;
+ next-level-cache = <&l2>;
+ };
+
+ cpu@1 {
+ device_type = "cpu";
+ compatible = "arm,cortex-a9";
+ clocks = <&clk 0>;
+ clock-names = "clk_cpu";
+ reg = <1>;
+ next-level-cache = <&l2>;
+ };
+ };
+ soc {
+ timer@3fe600 {
+ compatible = "arm,cortex-a9-twd-timer";
+ reg = <0x3fe600 0x20>;
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |
+ IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&clk 5>;
+ };
+ };
+};