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| author | Vladimir Zapolskiy <vz@mleia.com> | 2016-09-26 03:03:40 +0300 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2016-11-01 11:42:41 +0300 |
| commit | 2e575cbc930901718cc18e084566ecbb9a4b5ebb (patch) | |
| tree | fed2ca367588e9b68d2f185b025db4bcbc8cc509 /arch/arm/boot/dts/imx31.dtsi | |
| parent | 1001354ca34179f3db924eb66672442a173147dc (diff) | |
| download | linux-2e575cbc930901718cc18e084566ecbb9a4b5ebb.tar.xz | |
ARM: dts: imx31: fix clock control module interrupts description
The type of AVIC interrupt controller found on i.MX31 is one-cell,
namely 31 for CCM DVFS and 53 for CCM, however for clock control
module its interrupts are specified as 3-cells, fix it.
Fixes: ef0e4a606fb6 ("ARM: mx31: Replace clk_register_clkdev with clock DT lookup")
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'arch/arm/boot/dts/imx31.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx31.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi index 1ce7ae94e7ad..3e0893ea2581 100644 --- a/arch/arm/boot/dts/imx31.dtsi +++ b/arch/arm/boot/dts/imx31.dtsi @@ -122,7 +122,7 @@ clks: ccm@53f80000{ compatible = "fsl,imx31-ccm"; reg = <0x53f80000 0x4000>; - interrupts = <0 31 0x04 0 53 0x04>; + interrupts = <31>, <53>; #clock-cells = <1>; }; }; |