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authorEugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>2020-06-04 20:39:25 +0300
committerVineet Gupta <vgupta@synopsys.com>2020-06-18 23:07:24 +0300
commit10011f7d95dea311c0f2a3ea6725b5a2e97015a8 (patch)
treeb0564851714e50a0cd01124d824c4a98852adb0e /arch/arc
parent040ece2a3c1503c0a7e327034510367747c27a5f (diff)
downloadlinux-10011f7d95dea311c0f2a3ea6725b5a2e97015a8.tar.xz
ARCv2: support loop buffer (LPB) disabling
On HS cores, loop buffer (LPB) is programmable in runtime and can be optionally disabled. Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc')
-rw-r--r--arch/arc/Kconfig6
-rw-r--r--arch/arc/kernel/head.S8
2 files changed, 14 insertions, 0 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index 323014149e48..197896cfbd23 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -474,6 +474,12 @@ config ARC_IRQ_NO_AUTOSAVE
This is programmable and can be optionally disabled in which case
software INTERRUPT_PROLOGUE/EPILGUE do the needed work
+config ARC_LPB_DISABLE
+ bool "Disable loop buffer (LPB)"
+ help
+ On HS cores, loop buffer (LPB) is programmable in runtime and can
+ be optionally disabled.
+
endif # ISA_ARCV2
endmenu # "ARC CPU Configuration"
diff --git a/arch/arc/kernel/head.S b/arch/arc/kernel/head.S
index 6eb23f1545ee..17fd1ed700cc 100644
--- a/arch/arc/kernel/head.S
+++ b/arch/arc/kernel/head.S
@@ -59,6 +59,14 @@
bclr r5, r5, STATUS_AD_BIT
#endif
kflag r5
+
+#ifdef CONFIG_ARC_LPB_DISABLE
+ lr r5, [ARC_REG_LPB_BUILD]
+ breq r5, 0, 1f ; LPB doesn't exist
+ mov r5, 1
+ sr r5, [ARC_REG_LPB_CTRL]
+1:
+#endif /* CONFIG_ARC_LPB_DISABLE */
#endif
; Config DSP_CTRL properly, so kernel may use integer multiply,
; multiply-accumulate, and divide operations