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authorVineet Gupta <vgupta@synopsys.com>2016-10-31 23:46:38 +0300
committerVineet Gupta <vgupta@synopsys.com>2016-11-30 22:54:25 +0300
commitc4c9a040ecb7297e011e579f5a9cc280e42d725f (patch)
treea62aff3aba526fea0ccbff23f76bfa88f319dd8d /arch/arc/Kconfig
parentb26c2e3823bae6ba43a2b263d9bb75a3efd39b6a (diff)
downloadlinux-c4c9a040ecb7297e011e579f5a9cc280e42d725f.tar.xz
clocksource: import ARC timer driver
This adds support for - CONFIG_ARC_TIMERS : legacy 32-bit TIMER0 and TIMER1 which count UP from @CNT to @LIMIT, before optionally triggering an interrupt. These are programmed using ARC auxiliary register interface. These are present in all ARC cores (ARC700 and ARC HS38) TIMER0 serves as clockevent for all ARC linux builds. TIMER1 is used for clocksource in arc700 builds. - CONFIG_ARC_TIMERS_64BIT: 64-bit counters, RTC and GFRC found in ARC HS38 cores. These are independnet IP blocks with different programming model respectively. Link: http://lkml.kernel.org/r/20161111231132.GA4186@mai Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
Diffstat (limited to 'arch/arc/Kconfig')
-rw-r--r--arch/arc/Kconfig7
1 files changed, 2 insertions, 5 deletions
diff --git a/arch/arc/Kconfig b/arch/arc/Kconfig
index bde3e558d8bc..ab12723d39a0 100644
--- a/arch/arc/Kconfig
+++ b/arch/arc/Kconfig
@@ -8,9 +8,9 @@
config ARC
def_bool y
+ select ARC_TIMERS
select ARCH_SUPPORTS_ATOMIC_RMW if ARC_HAS_LLSC
select BUILDTIME_EXTABLE_SORT
- select CLKSRC_OF
select CLONE_BACKWARDS
select COMMON_CLK
select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
@@ -115,6 +115,7 @@ config ISA_ARCOMPACT
config ISA_ARCV2
bool "ARC ISA v2"
+ select ARC_TIMERS_64BIT
help
ISA for the Next Generation ARC-HS cores
@@ -410,10 +411,6 @@ config ARC_HAS_DIV_REM
bool "Insn: div, divu, rem, remu"
default y
-config ARC_TIMERS_64BIT
- bool "64-bit r/o cycle counters RTC (up) and GFRC (smp)"
- default y
-
config ARC_NUMBER_OF_INTERRUPTS
int "Number of interrupts"
range 8 240