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authorYaxing Guo <guoyaxing@bosc.ac.cn>2025-09-26 12:58:28 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2025-11-26 17:10:39 +0300
commit3397c3cd859a2c51962ad032dcf97961d42f9db2 (patch)
treeeaf026bed62d28352e96c51329368ca78e5c57dd /Documentation
parent4d4e746aa9f0f07261dcb41e4f51edb98723dcaa (diff)
downloadlinux-3397c3cd859a2c51962ad032dcf97961d42f9db2.tar.xz
uio: Add SVA support for PCI devices via uio_pci_generic_sva.c
This patch introduces a new UIO driver, uio_pci_generic_sva, which extends the functionality of uio_pci_generic by adding support for Shared Virtual Addressing (SVA) when IOMMU is enabled in the system. The key enhancement allows PCI devices to directly use user-space virtual addresses for DMA operations, eliminating the need for bounce buffers or explicit IOVA mapping. This is achieved by leveraging the kernel's IOMMU-SVA subsystem, including process address space attachment, page fault handling, and shared context management between CPU and device. With this driver, userspace applications can perform zero-copy DMA using native pointers: void *addr = malloc(N); set_dma_addr((uint64_t)addr); // Passing user VA directly start_dma(); The device can now access 'addr' through the IOMMU's PASID-based translation, provided that the underlying IOMMU hardware (e.g., Intel VT-d 3.1+, AMD-Vi, ARM SMMU, RISCV IOMMU) and platform support SVA. Dependencies: - CONFIG_IOMMU_SVA must be enabled. - The platform must support PRI (Page Request Interface) and PASID. - Device drivers/userspace must handle page faults if demand-paging is used. The implementation reuses core logic from uio_pci_generic.c while adding PASID setting, and integration with the IOMMU SVA APIs. Also, add a read-only sysfs attribute 'pasid' to expose the Process Address Space ID assigned by IOMMU driver when binding an SVA-enabled device. For details, refer to the ABI documentation for uio_pci_sva driver sysfs attribute (Documentation/ABI/testing/sysfs-driver-uio_pci_sva-pasid). Signed-off-by: Yaxing Guo <guoyaxing@bosc.ac.cn> Link: https://patch.msgid.link/20250926095828.506-1-guoyaxing@bosc.ac.cn Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/ABI/testing/sysfs-driver-uio_pci_sva-pasid29
1 files changed, 29 insertions, 0 deletions
diff --git a/Documentation/ABI/testing/sysfs-driver-uio_pci_sva-pasid b/Documentation/ABI/testing/sysfs-driver-uio_pci_sva-pasid
new file mode 100644
index 000000000000..6892fe46cea8
--- /dev/null
+++ b/Documentation/ABI/testing/sysfs-driver-uio_pci_sva-pasid
@@ -0,0 +1,29 @@
+What: /sys/bus/pci/drivers/uio_pci_sva/<pci_dev>/pasid
+Date: September 2025
+Contact: Yaxing Guo <guoyaxing@bosc.ac.cn>
+Description:
+ Process Address Space ID (PASID) assigned by IOMMU driver to
+ the device for use with Shared Virtual Addressing (SVA).
+
+ This read-only attribute exposes the PASID (A 20-bit identifier
+ used in PCIe Address Translation Services and iommu table walks)
+ allocated by the IOMMU driver during sva device binding.
+
+ User-space UIO applications must read this attribute to obtain
+ the PASID and program it into the device's configuration registers.
+ This enables the device to perform DMA using user-space virtual
+ address, with address translation handled by IOMMU.
+
+ UIO User-space applications must:
+ - Opening device and Mapping the device's register space via /dev/uioX
+ (This triggers the IOMMU driver to allocate the PASID)
+ - Reading the PASID from sysfs
+ - Writing the PASID to a device-specific register (with example offset)
+ The code may be like:
+
+ map = mmap(..., "/dev/uio0", ...);
+
+ f = fopen("/sys/.../pasid", "r");
+ fscanf(f, "%d", &pasid);
+
+ map[REG_PASID_OFFSET] = pasid;