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| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-03-26 21:45:42 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2026-03-26 21:45:42 +0300 |
| commit | 30e7ff3598bb9d686a6e56a56b06cf2f07180bef (patch) | |
| tree | 612757a6489ae64d6e0e3a59d56c2e04eaadc170 /Documentation | |
| parent | bf497e7babb5d14570b18b5d2c8a6bb14d4a733b (diff) | |
| parent | b822fb82505af4cc3f14fed05b8069c67d2ed5fb (diff) | |
| download | linux-30e7ff3598bb9d686a6e56a56b06cf2f07180bef.tar.xz | |
Merge tag 'renesas-r9a08g046-dt-binding-defs-tag1' into renesas-clk-for-v7.1
Renesas RZ/G3L DT Binding Definitions
DT bindings and binding definitions for the Renesas RZ/G3L (R9A08G046)
SoC, shared by driver and DT source files.
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml | 40 |
1 files changed, 35 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml index 8c18616e5c4d..c0ce687d83ee 100644 --- a/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml +++ b/Documentation/devicetree/bindings/clock/renesas,rzg2l-cpg.yaml @@ -28,19 +28,30 @@ properties: - renesas,r9a07g044-cpg # RZ/G2{L,LC} - renesas,r9a07g054-cpg # RZ/V2L - renesas,r9a08g045-cpg # RZ/G3S + - renesas,r9a08g046-cpg # RZ/G3L - renesas,r9a09g011-cpg # RZ/V2M reg: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + items: + - description: Clock source to CPG can be either from external clock + input (EXCLK) or crystal oscillator (XIN/XOUT). + - description: ETH0 TXC clock input + - description: ETH0 RXC clock input + - description: ETH1 TXC clock input + - description: ETH1 RXC clock input clock-names: - description: - Clock source to CPG can be either from external clock input (EXCLK) or - crystal oscillator (XIN/XOUT). - const: extal + minItems: 1 + items: + - const: extal + - const: eth0_txc_tx_clk + - const: eth0_rxc_rx_clk + - const: eth1_txc_tx_clk + - const: eth1_rxc_rx_clk '#clock-cells': description: | @@ -74,6 +85,25 @@ required: - '#power-domain-cells' - '#reset-cells' +allOf: + - if: + properties: + compatible: + contains: + const: renesas,r9a08g046-cpg + then: + properties: + clocks: + minItems: 5 + clock-names: + minItems: 5 + else: + properties: + clocks: + maxItems: 1 + clock-names: + maxItems: 1 + additionalProperties: false examples: |