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author | Chew, Kean ho <kean.ho.chew@intel.com> | 2014-02-28 20:03:56 +0400 |
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committer | Wolfram Sang <wsa@the-dreams.de> | 2014-03-10 00:40:25 +0400 |
commit | 1b31e9b76ef8c62291e698dfdb973499986a7f68 (patch) | |
tree | e02805be38f020645dbd89828572375c39468ee8 /Documentation/i2c/busses | |
parent | 089c729ae440c6df35eeac7998525718fcee0323 (diff) | |
download | linux-1b31e9b76ef8c62291e698dfdb973499986a7f68.tar.xz |
i2c: i801: enable Intel BayTrail SMBUS
Add Device ID of Intel BayTrail SMBus Controller.
Signed-off-by: Chew, Kean ho <kean.ho.chew@intel.com>
Signed-off-by: Chew, Chiau Ee <chiau.ee.chew@intel.com>
Reviewed-by: Jean Delvare <jdelvare@suse.de>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'Documentation/i2c/busses')
-rw-r--r-- | Documentation/i2c/busses/i2c-i801 | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/Documentation/i2c/busses/i2c-i801 b/Documentation/i2c/busses/i2c-i801 index aaaf069306a3..adf5e33e8312 100644 --- a/Documentation/i2c/busses/i2c-i801 +++ b/Documentation/i2c/busses/i2c-i801 @@ -26,6 +26,7 @@ Supported adapters: * Intel Wellsburg (PCH) * Intel Coleto Creek (PCH) * Intel Wildcat Point-LP (PCH) + * Intel BayTrail (SOC) Datasheets: Publicly available at the Intel website On Intel Patsburg and later chipsets, both the normal host SMBus controller |