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author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-08-20 20:42:41 +0300 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2025-08-20 20:42:41 +0300 |
commit | 5c40cd7db64a2949f268d7467b9be551a565d14b (patch) | |
tree | fb8a67f6edcb0c9922c256a598d675c1c04051d6 /Documentation/gpu/amdgpu/gc/mes.rst | |
parent | 8bde384a2090759efc9b92f34300887d418a2a3a (diff) | |
parent | 25bf10be219d37d2fb221c93816a913f5f735530 (diff) | |
download | linux-rolling-stable.tar.xz |
Merge v6.16.2linux-rolling-stable
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'Documentation/gpu/amdgpu/gc/mes.rst')
-rw-r--r-- | Documentation/gpu/amdgpu/gc/mes.rst | 38 |
1 files changed, 38 insertions, 0 deletions
diff --git a/Documentation/gpu/amdgpu/gc/mes.rst b/Documentation/gpu/amdgpu/gc/mes.rst new file mode 100644 index 000000000000..b99eb211b179 --- /dev/null +++ b/Documentation/gpu/amdgpu/gc/mes.rst @@ -0,0 +1,38 @@ +.. _amdgpu-mes: + +============================= + MicroEngine Scheduler (MES) +============================= + +.. note:: + Queue and ring buffer are used as a synonymous. + +.. note:: + This section assumes that you are familiar with the concept of Pipes, Queues, and GC. + If not, check :ref:`GFX, Compute, and SDMA Overall Behavior<pipes-and-queues-description>` + and :ref:`drm/amdgpu - Graphics and Compute (GC) <amdgpu-gc>`. + +Every GFX has a pipe component with one or more hardware queues. Pipes can +switch between queues depending on certain conditions, and one of the +components that can request a queue switch to a pipe is the MicroEngine +Scheduler (MES). Whenever the driver is initialized, it creates one MQD per +hardware queue, and then the MQDs are handed to the MES firmware for mapping +to: + +1. Kernel Queues (legacy): This queue is statically mapped to HQDs and never + preempted. Even though this is a legacy feature, it is the current default, and + most existing hardware supports it. When an application submits work to the + kernel driver, it submits all of the application command buffers to the kernel + queues. The CS IOCTL takes the command buffer from the applications and + schedules them on the kernel queue. + +2. User Queues: These queues are dynamically mapped to the HQDs. Regarding the + utilization of User Queues, the userspace application will create its user + queues and submit work directly to its user queues with no need to IOCTL for + each submission and no need to share a single kernel queue. + +In terms of User Queues, MES can dynamically map them to the HQD. If there are +more MQDs than HQDs, the MES firmware will preempt other user queues to make +sure each queues get a time slice; in other words, MES is a microcontroller +that handles the mapping and unmapping of MQDs into HQDs, as well as the +priorities and oversubscription of MQDs. |