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authorDan Williams <dan.j.williams@intel.com>2021-08-02 20:29:49 +0300
committerDan Williams <dan.j.williams@intel.com>2021-08-06 18:22:53 +0300
commit06737cd0d216be1cf6e8052e4fca0d391298f184 (patch)
tree76c8172133fa52148d271c10d238a8b503089292 /Documentation/driver-api/cxl
parent95aaed266801a801add6d17cd3a4f7deb610af2e (diff)
downloadlinux-06737cd0d216be1cf6e8052e4fca0d391298f184.tar.xz
cxl/core: Move pmem functionality
Refactor the pmem / nvdimm-bridge functionality from core/bus.c to core/pmem.c. Introduce drivers/core/core.h to communicate data structures and helpers between the core bus and other functionality that registers devices on the bus. Signed-off-by: Ben Widawsky <ben.widawsky@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/162792538899.368511.3881663908293411300.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Diffstat (limited to 'Documentation/driver-api/cxl')
-rw-r--r--Documentation/driver-api/cxl/memory-devices.rst3
1 files changed, 3 insertions, 0 deletions
diff --git a/Documentation/driver-api/cxl/memory-devices.rst b/Documentation/driver-api/cxl/memory-devices.rst
index a86e2c7c551a..e65c0ba82229 100644
--- a/Documentation/driver-api/cxl/memory-devices.rst
+++ b/Documentation/driver-api/cxl/memory-devices.rst
@@ -39,6 +39,9 @@ CXL Core
.. kernel-doc:: drivers/cxl/core/bus.c
:doc: cxl core
+.. kernel-doc:: drivers/cxl/core/pmem.c
+ :internal:
+
External Interfaces
===================