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authorMarcel Ziswiler <marcel.ziswiler@toradex.com>2018-07-20 11:22:57 +0300
committerRob Herring <robh@kernel.org>2018-07-25 23:09:39 +0300
commit13d6753f1d250885749386867c4a4e8c06c905da (patch)
treeb8048765ae262e02b998406a6d60689d059cc1eb /Documentation/devicetree
parentebfee0309d496d89279d612ee99023f9bbf4f34e (diff)
downloadlinux-13d6753f1d250885749386867c4a4e8c06c905da.tar.xz
pinctrl: tegra: fix spelling in devicetree binding document
This fixes a spelling mistake. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Jon Hunter <jonathanh@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
-rw-r--r--Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt2
-rw-r--r--Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt2
2 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
index ecb5c0d25218..f4d06bb0b55a 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra124-pinmux.txt
@@ -17,7 +17,7 @@ Tegra124 adds the following optional properties for pin configuration subnodes.
The macros for options are defined in the
include/dt-binding/pinctrl/pinctrl-tegra.h.
- nvidia,enable-input: Integer. Enable the pin's input path.
- enable :TEGRA_PIN_ENABLE0 and
+ enable :TEGRA_PIN_ENABLE and
disable or output only: TEGRA_PIN_DISABLE.
- nvidia,open-drain: Integer.
enable: TEGRA_PIN_ENABLE.
diff --git a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt
index a62d82d5fbe9..85f211436b8e 100644
--- a/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt
+++ b/Documentation/devicetree/bindings/pinctrl/nvidia,tegra210-pinmux.txt
@@ -44,7 +44,7 @@ Optional subnode-properties:
- nvidia,tristate: Integer.
0: drive, 1: tristate.
- nvidia,enable-input: Integer. Enable the pin's input path.
- enable :TEGRA_PIN_ENABLE0 and
+ enable :TEGRA_PIN_ENABLE and
disable or output only: TEGRA_PIN_DISABLE.
- nvidia,open-drain: Integer.
enable: TEGRA_PIN_ENABLE.