diff options
| author | Conor Dooley <conor.dooley@microchip.com> | 2023-03-30 20:32:56 +0300 |
|---|---|---|
| committer | Rob Herring <robh@kernel.org> | 2023-04-04 20:12:13 +0300 |
| commit | dc8ea9204b242cd93e63585396ac7d13f622802d (patch) | |
| tree | 1073f0a5dc0669c08b65a4523185e386466aff4c /Documentation/devicetree | |
| parent | 0291b586ef5df4fe9a626d01dbd53e01f8c41e3c (diff) | |
| download | linux-dc8ea9204b242cd93e63585396ac7d13f622802d.tar.xz | |
dt-bindings: move cache controller bindings to a cache directory
There's a bunch of bindings for (mostly l2) cache controllers
scattered to the four winds, move them to a common directory.
I renamed the freescale l2cache.txt file, as while that might make sense
when the parent dir is fsl, it's confusing after the move.
The two Marvell bindings have had a "marvell," prefix added to match
their compatibles.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20230330173255.109731-1-conor@kernel.org
Signed-off-by: Rob Herring <robh@kernel.org>
Diffstat (limited to 'Documentation/devicetree')
| -rw-r--r-- | Documentation/devicetree/bindings/cache/baikal,bt1-l2-ctl.yaml (renamed from Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml) | 2 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/cache/freescale-l2cache.txt (renamed from Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt) | 0 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/cache/l2c2x0.yaml (renamed from Documentation/devicetree/bindings/arm/l2c2x0.yaml) | 2 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt (renamed from Documentation/devicetree/bindings/arm/mrvl/feroceon.txt) | 0 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt (renamed from Documentation/devicetree/bindings/arm/mrvl/tauros2.txt) | 0 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/cache/qcom,llcc.yaml (renamed from Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml) | 2 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/cache/sifive,ccache0.yaml (renamed from Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml) | 2 | ||||
| -rw-r--r-- | Documentation/devicetree/bindings/cache/socionext,uniphier-system-cache.yaml (renamed from Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml) | 2 |
8 files changed, 5 insertions, 5 deletions
diff --git a/Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml b/Documentation/devicetree/bindings/cache/baikal,bt1-l2-ctl.yaml index 1fca282f64a2..ec4f367bc0b4 100644 --- a/Documentation/devicetree/bindings/memory-controllers/baikal,bt1-l2-ctl.yaml +++ b/Documentation/devicetree/bindings/cache/baikal,bt1-l2-ctl.yaml @@ -2,7 +2,7 @@ # Copyright (C) 2020 BAIKAL ELECTRONICS, JSC %YAML 1.2 --- -$id: http://devicetree.org/schemas/memory-controllers/baikal,bt1-l2-ctl.yaml# +$id: http://devicetree.org/schemas/cache/baikal,bt1-l2-ctl.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Baikal-T1 L2-cache Control Block diff --git a/Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt b/Documentation/devicetree/bindings/cache/freescale-l2cache.txt index 22ad012660e9..22ad012660e9 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/l2cache.txt +++ b/Documentation/devicetree/bindings/cache/freescale-l2cache.txt diff --git a/Documentation/devicetree/bindings/arm/l2c2x0.yaml b/Documentation/devicetree/bindings/cache/l2c2x0.yaml index 6b8f4d4fa580..d7840a5c4037 100644 --- a/Documentation/devicetree/bindings/arm/l2c2x0.yaml +++ b/Documentation/devicetree/bindings/cache/l2c2x0.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 %YAML 1.2 --- -$id: http://devicetree.org/schemas/arm/l2c2x0.yaml# +$id: http://devicetree.org/schemas/cache/l2c2x0.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: ARM L2 Cache Controller diff --git a/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt b/Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt index 0d244b999d10..0d244b999d10 100644 --- a/Documentation/devicetree/bindings/arm/mrvl/feroceon.txt +++ b/Documentation/devicetree/bindings/cache/marvell,feroceon-cache.txt diff --git a/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt b/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt index 31af1cbb60bd..31af1cbb60bd 100644 --- a/Documentation/devicetree/bindings/arm/mrvl/tauros2.txt +++ b/Documentation/devicetree/bindings/cache/marvell,tauros2-cache.txt diff --git a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml index 38efcad56dbd..14eb5175dac4 100644 --- a/Documentation/devicetree/bindings/arm/msm/qcom,llcc.yaml +++ b/Documentation/devicetree/bindings/cache/qcom,llcc.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/arm/msm/qcom,llcc.yaml# +$id: http://devicetree.org/schemas/cache/qcom,llcc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Last Level Cache Controller diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml index eb6ab73c0f31..8a6a78e1a7ab 100644 --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/cache/sifive,ccache0.yaml @@ -2,7 +2,7 @@ # Copyright (C) 2020 SiFive, Inc. %YAML 1.2 --- -$id: http://devicetree.org/schemas/riscv/sifive,ccache0.yaml# +$id: http://devicetree.org/schemas/cache/sifive,ccache0.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: SiFive Composable Cache Controller diff --git a/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml b/Documentation/devicetree/bindings/cache/socionext,uniphier-system-cache.yaml index 6096c082d56d..3196263685a3 100644 --- a/Documentation/devicetree/bindings/arm/socionext/socionext,uniphier-system-cache.yaml +++ b/Documentation/devicetree/bindings/cache/socionext,uniphier-system-cache.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause %YAML 1.2 --- -$id: http://devicetree.org/schemas/arm/socionext/socionext,uniphier-system-cache.yaml# +$id: http://devicetree.org/schemas/cache/socionext,uniphier-system-cache.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: UniPhier outer cache controller |