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authorLinus Torvalds <torvalds@linux-foundation.org>2020-10-15 01:31:58 +0300
committerLinus Torvalds <torvalds@linux-foundation.org>2020-10-15 01:31:58 +0300
commitf888bdf9823c85fe945c4eb3ba353f749dec3856 (patch)
tree3bc21281538eb4f138d6aa280a4f44743b4b9d01 /Documentation/devicetree/bindings/serial/fsl-imx-uart.yaml
parentb4e1bce85fd8f43dc814049e2641cc6beaa8146b (diff)
parentbd36e51d10e7c2b7d39ffa7d075aed98a8e7473c (diff)
downloadlinux-f888bdf9823c85fe945c4eb3ba353f749dec3856.tar.xz
Merge tag 'devicetree-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux
Pull devicetree updates from Rob Herring: - Update dtc to upstream version v1.6.0-31-gcbca977ea121 - dtx_diff help text reformatting - Speed-up validation time for binding and dtb checks using json for intermediate files - Add support for running yamllint on DT schema files - Remove old booting-without-of.rst - Extend the example schema to address common issues - Cleanup handling of additionalProperties/unevaluatedProperties - Ensure all DSI controller schemas reference dsi-controller.yaml - Vendor prefixes for Zealz, Wandbord/Technexion, Embest RIoT, Rex, DFI, and Cisco Meraki - Convert at25, SPMI bus, TI hwlock, HiSilicon Hi3660 USB3 PHY, Arm SP805 watchdog, Arm SP804, and Samsung 11-pin USB connector to DT schema - Convert HiSilicon SoC and syscon bindings to DT schema - Convert SiFive Risc-V L2 cache, PLIC, PRCI, and PWM to DT schema - Convert i.MX bindings for w1, crypto, rng, SIM, PM, DDR, SATA, vf610 GPIO, and UART to DT schema - Add i.MX 8M compatible strings - Add LM81 and DS1780 as trivial devices - Various missing properties added to fix dtb validation warnings * tag 'devicetree-for-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (111 commits) dt-bindings: misc: explicitly add #address-cells for slave mode spi: dt-bindings: spi-controller: explicitly require #address-cells=<0> for slave mode dt: Remove booting-without-of.rst dt-bindings: update usb-c-connector example dt-bindings: arm: hisilicon: add missing properties into cpuctrl.yaml dt-bindings: arm: hisilicon: add missing properties into sysctrl.yaml dt-bindings: pwm: imx: document i.MX compatibles scripts/dtc: Update to upstream version v1.6.0-31-gcbca977ea121 dt-bindings: Add running yamllint to dt_binding_check dt-bindings: powerpc: Add a schema for the 'sleep' property dt-bindings: pinctrl: sirf: Fix typo abitrary dt-bindings: pinctrl: qcom: Fix typo abitrary dt-bindings: Explicitly allow additional properties in common schemas dt-bindings: Use 'additionalProperties' instead of 'unevaluatedProperties' dt-bindings: Add missing 'unevaluatedProperties' Docs: Fixing spelling errors in Documentation/devicetree/bindings/ dt-bindings: arm: hisilicon: convert Hi6220 domain controller bindings to json-schema dt-bindings: riscv: convert pwm bindings to json-schema dt-bindings: riscv: convert plic bindings to json-schema dt-bindings: fu540: prci: convert PRCI bindings to json-schema ...
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/serial/fsl-imx-uart.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX Universal Asynchronous Receiver/Transmitter (UART)
+
+maintainers:
+ - Fabio Estevam <fabio.estevam@nxp.com>
+
+allOf:
+ - $ref: "serial.yaml"
+ - $ref: "rs485.yaml"
+
+properties:
+ compatible:
+ oneOf:
+ - const: fsl,imx1-uart
+ - const: fsl,imx21-uart
+ - items:
+ - enum:
+ - fsl,imx25-uart
+ - fsl,imx27-uart
+ - fsl,imx31-uart
+ - fsl,imx35-uart
+ - fsl,imx50-uart
+ - fsl,imx51-uart
+ - fsl,imx53-uart
+ - fsl,imx6q-uart
+ - const: fsl,imx21-uart
+ - items:
+ - enum:
+ - fsl,imx6sl-uart
+ - fsl,imx6sll-uart
+ - fsl,imx6sx-uart
+ - const: fsl,imx6q-uart
+ - const: fsl,imx21-uart
+ - items:
+ - enum:
+ - fsl,imx6ul-uart
+ - fsl,imx7d-uart
+ - fsl,imx8mm-uart
+ - fsl,imx8mn-uart
+ - fsl,imx8mp-uart
+ - fsl,imx8mq-uart
+ - const: fsl,imx6q-uart
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ fsl,dte-mode:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Indicate the uart works in DTE mode. The uart works in DCE mode by default.
+
+ fsl,inverted-tx:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Indicate that the hardware attached to the peripheral inverts the signal
+ transmitted, and that the peripheral should invert its output using the
+ INVT registers.
+
+ fsl,inverted-rx:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: |
+ Indicate that the hardware attached to the peripheral inverts the signal
+ received, and that the peripheral should invert its input using the
+ INVR registers.
+
+ uart-has-rtscts: true
+
+ rs485-rts-delay: true
+ rs485-rts-active-low: true
+ rs485-rx-during-tx: true
+ linux,rs485-enabled-at-boot-time: true
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ aliases {
+ serial0 = &uart1;
+ };
+
+ uart1: serial@73fbc000 {
+ compatible = "fsl,imx51-uart", "fsl,imx21-uart";
+ reg = <0x73fbc000 0x4000>;
+ interrupts = <31>;
+ uart-has-rtscts;
+ fsl,dte-mode;
+ };