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authorhuangdaode <huangdaode@hisilicon.com>2015-09-17 09:51:46 +0300
committerDavid S. Miller <davem@davemloft.net>2015-09-21 07:42:57 +0300
commitfc7e37c6b2704fb0360f7ecf747d5d3012ef9632 (patch)
treec15d091d6c0ff7926393695fd5fe57f56ae99940 /Documentation/devicetree/bindings/net/hisilicon-hns-nic.txt
parent812494d9a0cacf77e0a538be18183c7b471812aa (diff)
downloadlinux-fc7e37c6b2704fb0360f7ecf747d5d3012ef9632.tar.xz
net: add Hisilicon Network Subsystem support (config and documents)
The Hisilicon Network Subsystem is a long term evolution IP which is supposed to be used in Hisilicon ICT SoC. The IP, which is called hns for short, is a TCP/IP acceleration engine, which can directly decode TCP/IP stream and distribute them to different ring buffers. HNS can be configured to work on different mode for different scenario. This patch make use only some of the mode to make it as standard ethernet NIC. The other mode will be added soon. The whole function has 4 kernel sub-modules: hnae: the HNS acceleration engine framework. It provides a abstract interface between the engine and the upper layers which make use of the engine by ring buffer. hns_enet_drv: a standard ethernet driver that base on the ring buffer. hns_dsaf: one of the implementation of HNS acceleration engine, which is applied on Hililicon hip05, Hi1610 and other later-on SoCs hns_mdio: the mdio control to the PHY, used by acceleration engine This submit add basic config and documents Signed-off-by: huangdaode <huangdaode@hisilicon.com> Signed-off-by: Kenneth Lee <liguozhu@huawei.com> Signed-off-by: Yisen Zhuang <Yisen.Zhuang@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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+Hisilicon Network Subsystem NIC controller
+
+Required properties:
+- compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
+ "hisilicon,hns-nic-v1" is for hip05.
+ "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
+- ae-name: accelerator name who provides this interface,
+ is simply a name referring to the name of name in the accelerator node.
+- port-id: is the index of port provided by DSAF (the accelerator). DSAF can
+ connect to 8 PHYs. Port 0 to 1 are both used for adminstration purpose. They
+ are called debug ports.
+
+ The remaining 6 PHYs are taken according to the mode of DSAF.
+
+ In NIC mode of DSAF, all 6 PHYs are taken as ethernet ports to the CPU. The
+ port-id can be 2 to 7. Here is the diagram:
+ +-----+---------------+
+ | CPU |
+ +-+-+-+---+-+-+-+-+-+-+
+ | | | | | | | |
+ debug service
+ port port
+ (0,1) (2-7)
+
+ In Switch mode of DSAF, all 6 PHYs are taken as physical ports connect to a
+ LAN Switch while the CPU side assume itself have one single NIC connect to
+ this switch. In this case, the port-id will be 2 only.
+ +-----+---------------+
+ | CPU |
+ +-+-+-+---+-+-+-+-+-+-+
+ | | service| port(2)
+ debug +------------+
+ port | switch |
+ (0,1) +-+-+-+-+-+-++
+ | | | | | |
+ external port
+
+- local-mac-address: mac addr of the ethernet interface
+
+Example:
+
+ ethernet@0{
+ compatible = "hisilicon,hns-nic-v1";
+ ae-name = "dsaf0";
+ port-id = <0>;
+ local-mac-address = [a2 14 e4 4b 56 76];
+ };