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| author | Josua Mayer <josua@solid-run.com> | 2022-05-17 11:54:29 +0300 |
|---|---|---|
| committer | Jakub Kicinski <kuba@kernel.org> | 2022-05-19 05:58:20 +0300 |
| commit | 1f77204e11f8b9e5d77d65197a03b702c50ea29b (patch) | |
| tree | c262afb6d290d0059575abe32ee2d9f784233071 /Documentation/devicetree/bindings/net/adi,adin.yaml | |
| parent | a3641ca416a3da7cbeae5bcf1fc26ba9797a1438 (diff) | |
| download | linux-1f77204e11f8b9e5d77d65197a03b702c50ea29b.tar.xz | |
dt-bindings: net: adin: document phy clock output properties
The ADIN1300 supports generating certain clocks on its GP_CLK pin, as
well as providing the reference clock on CLK25_REF.
Add DT properties to configure both pins.
Technically the phy also supports a recovered 125MHz clock for
synchronous ethernet. However SyncE should be configured dynamically at
runtime, so it is explicitly omitted in this binding.
Signed-off-by: Josua Mayer <josua@solid-run.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'Documentation/devicetree/bindings/net/adi,adin.yaml')
| -rw-r--r-- | Documentation/devicetree/bindings/net/adi,adin.yaml | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/net/adi,adin.yaml b/Documentation/devicetree/bindings/net/adi,adin.yaml index 1129f2b58e98..77750df0c2c4 100644 --- a/Documentation/devicetree/bindings/net/adi,adin.yaml +++ b/Documentation/devicetree/bindings/net/adi,adin.yaml @@ -36,6 +36,21 @@ properties: enum: [ 4, 8, 12, 16, 20, 24 ] default: 8 + adi,phy-output-clock: + description: Select clock output on GP_CLK pin. Two clocks are available: + A 25MHz reference and a free-running 125MHz. + The phy can alternatively automatically switch between the reference and + the 125MHz clocks based on its internal state. + $ref: /schemas/types.yaml#/definitions/string + enum: + - 25mhz-reference + - 125mhz-free-running + - adaptive-free-running + + adi,phy-output-reference-clock: + description: Enable 25MHz reference clock output on CLK25_REF pin. + type: boolean + unevaluatedProperties: false examples: |