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authorFlorian Vaussard <florian.vaussard@epfl.ch>2014-03-01 00:42:35 +0400
committerJoerg Roedel <joro@8bytes.org>2014-03-04 20:01:55 +0400
commita8689f65de5a8c3e47bf29c2550dfebe0744e077 (patch)
treeb783d174ff647254ade15bda0000a3514c84879e /Documentation/devicetree/bindings/iommu/ti,omap-iommu.txt
parent90e569c4ca727b59ba8f82a9cd5e2f43462bbc3b (diff)
downloadlinux-a8689f65de5a8c3e47bf29c2550dfebe0744e077.tar.xz
Documentation: dt: add OMAP iommu bindings
This patch adds the iommu bindings for all OMAP2+ SoCs. Apart from the standard bindings used by OMAP peripherals, this patch uses a 'dma-window' (already used by Tegra SMMU) and adds two OMAP custom bindings - 'ti,#tlb-entries' and 'ti,iommu-bus-err-back'. Signed-off-by: Florian Vaussard <florian.vaussard@epfl.ch> [s-anna@ti.com: split bindings document, add dra7 and bus error back] Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Joerg Roedel <joro@8bytes.org>
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+OMAP2+ IOMMU
+
+Required properties:
+- compatible : Should be one of,
+ "ti,omap2-iommu" for OMAP2/OMAP3 IOMMU instances
+ "ti,omap4-iommu" for OMAP4/OMAP5 IOMMU instances
+ "ti,dra7-iommu" for DRA7xx IOMMU instances
+- ti,hwmods : Name of the hwmod associated with the IOMMU instance
+- reg : Address space for the configuration registers
+- interrupts : Interrupt specifier for the IOMMU instance
+
+Optional properties:
+- ti,#tlb-entries : Number of entries in the translation look-aside buffer.
+ Should be either 8 or 32 (default: 32)
+- ti,iommu-bus-err-back : Indicates the IOMMU instance supports throwing
+ back a bus error response on MMU faults.
+
+Example:
+ /* OMAP3 ISP MMU */
+ mmu_isp: mmu@480bd400 {
+ compatible = "ti,omap2-iommu";
+ reg = <0x480bd400 0x80>;
+ interrupts = <24>;
+ ti,hwmods = "mmu_isp";
+ ti,#tlb-entries = <8>;
+ };