diff options
| author | Chris Packham <chris.packham@alliedtelesis.co.nz> | 2022-05-26 04:29:46 +0300 |
|---|---|---|
| committer | Bartosz Golaszewski <brgl@bgdev.pl> | 2022-07-19 10:56:34 +0300 |
| commit | df08a6fc0d5d7dd579dd0902893a433765d9f4c5 (patch) | |
| tree | cfb01dac34a0be1bda92f342509fecb4515eccf8 /Documentation/devicetree/bindings/gpio | |
| parent | 988c8c0cd04de81c7cde5b0a55cabf0c67136340 (diff) | |
| download | linux-df08a6fc0d5d7dd579dd0902893a433765d9f4c5.tar.xz | |
dt-bindings: gpio: gpio-mvebu: document offset and marvell,pwm-offset
The offset and marvell,pwm-offset properties weren't in the old binding.
Add them based on the existing usage in the driver and board DTS when
the marvell,armada-8k-gpio compatible is used.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
Diffstat (limited to 'Documentation/devicetree/bindings/gpio')
| -rw-r--r-- | Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml index 459ec35864fe..f1bd1e6b2e1f 100644 --- a/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml +++ b/Documentation/devicetree/bindings/gpio/gpio-mvebu.yaml @@ -45,6 +45,10 @@ properties: - const: pwm minItems: 1 + offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the gpio registers (in bytes) + interrupts: description: | The list of interrupts that are used for all the pins managed by this @@ -68,6 +72,10 @@ properties: "#gpio-cells": const: 2 + marvell,pwm-offset: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Offset in the register map for the pwm registers (in bytes) + "#pwm-cells": description: The first cell is the GPIO line number. The second cell is the period |